Datasheet

2011-2012 Microchip Technology Inc. Preliminary DS61168E-page 55
PIC32MX1XX/2XX
TABLE 4-13: COMPARATOR REGISTER MAP
Virtual Address
(BF80_#)
Register
Name
(1)
Bit Range
Bits
All Resets
31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0
A000 CM1CON
31:16
0000
15:0 ON COE CPOL
—COUTEVPOL<1:0> CREF CCH<1:0> 00C3
A010 CM2CON
31:16
0000
15:0 ON COE CPOL
—COUTEVPOL<1:0> CREF CCH<1:0> 00C3
A020 CM3CON
31:16
0000
15:0 ON COE CPOL
—COUTEVPOL<1:0> CREF CCH<1:0> 00C3
A060 CMSTAT
31:16
0000
15:0
—SIDL C3OUT C2OUT C1OUT 0000
Legend: x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Note 1: All registers in this table have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See Section 11.2 “CLR, SET and INV Registers” for
more information.
TABLE 4-14: COMPARATOR VOLTAGE REFERENCE REGISTER MAP
Virtual Address
(BF80_#)
Register
Name
(1)
Bit Range
Bits
All Resets
31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0
9800 CVRCON
31:16
0000
15:0 ON
CVROE CVRR CVRSS CVR<3:0> 0000
Legend: x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Note 1: All registers in this table have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See Section 11.2 “CLR, SET and INV Registers” for
more information.