Datasheet

ManualsBrandsMICROCHIP TECHNOLOGY ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller SSOP 28 32-Bit 40 MHz I/O number 21

100

 2011-2012 Microchip Technology Inc. Preliminary DS61168E-page 95

PIC32MX1XX/2XX

Bit

Range

Bit

31/23/15/7

Bit

30/22/14/6

Bit

29/21/13/5

Bit

28/20/12/4

Bit

27/19/11/3

Bit

26/18/10/2

Bit

25/17/9/1

Bit

24/16/8/0

31:24

U-0 U-0 R/W-y R/W-y R/W-y R/W-0 R/W-0 R/W-1

— — PLLODIV<2:0> FRCDIV<2:0>

23:16

U-0 R-0 R-1 R/W-y R/W-y R/W-y R/W-y R/W-y

— SOSCRDY PBDIVRDY PBDIV<1:0> PLLMULT<2:0>

15:8

U-0 R-0 R-0 R-0 U-0 R/W-y R/W-y R/W-y

— COSC<2:0> — NOSC<2:0>

7:0

R/W-0 R-0 R-0 R/W-0 R/W-0 R/W-0 R/W-y R/W-0

CLKLOCK ULOCK

(1)

SLOCK SLPEN CF UFRCEN

(1)

SOSCEN OSWEN

Legend: y = Value set from Configuration bits on POR

R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’

-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown

bit 31-30 Unimplemented: Read as ‘0’

bit 29-27 PLLODIV<2:0>: Output Divider for PLL

111 = PLL output divided by 256

110 = PLL output divided by 64

101 = PLL output divided by 32

100 = PLL output divided by 16

011 = PLL output divided by 8

010 = PLL output divided by 4

001 = PLL output divided by 2

000 = PLL output divided by 1

bit 26-24 FRCDIV<2:0>: Internal Fast RC (FRC) Oscillator Clock Divider bits

111 = FRC divided by 256

110 = FRC divided by 64

101 = FRC divided by 32

100 = FRC divided by 16

011 = FRC divided by 8

010 = FRC divided by 4

001 = FRC divided by 2 (default setting)

000 = FRC divided by 1

bit 23 Unimplemented: Read as ‘0’

bit 22 SOSCRDY: Secondary Oscillator (S

OSC) Ready Indicator bit

1 = Indicates that the Secondary Oscillator is running and is stable

0 = Secondary Oscillator is still warming up or is turned off

bit 21 PBDIVRDY: Peripheral Bus Clock (PBCLK) Divisor Ready bit

1 = PBDIV<1:0> bits can be written

0 = PBDIV<1:0> bits cannot be written

bit 20-19 PBDIV<1:0>: Peripheral Bus Clock (PBCLK) Divisor bits

11 = PBCLK is SYSCLK divided by 8 (default)

10 = PBCLK is SYSCLK divided by 4

01 = PBCLK is SYSCLK divided by 2

00 = PBCLK is SYSCLK divided by 1

Note 1: This bit is available on PIC32MX2XX devices only.

Note: Writes to this register require an unlock sequence. Refer to Section 6. “Oscillator” (DS61112) in the

“PIC32 Family Reference Manual” for details.