Datasheet
PIC32MX1XX/2XX
DS61168E-page 94 Preliminary 2011-2012 Microchip Technology Inc.
FIGURE 8-1: OSCILLATOR DIAGRAM
Timer1, RTCC
Clock Control Logic
Fail-Safe
Clock
Monitor
FSCM INT
FSCM Event
COSC<2:0>
NOSC<2:0>
OSWEN
FSCMEN<1:0>
PLL
Secondary Oscillator (SOSC)
SOSCEN and FSOSCEN
SOSCO
SOSCI
Primary Oscillator
P
OSC (XT, HS, EC)
CPU and Select Peripherals
Peripherals
FRCDIV<2:0>
WDT, PWRT
8 MHz typical
FRC
31.25 kHz typical
FRC
Oscillator
LPRC
Oscillator
SOSC
LPRC
FRCDIV
TUN<5:0>
div 16
Postscaler
FPLLIDIV<2:0>
PBDIV<1:0>
FRC/16
Postscaler
COSC<2:0>
FIN
div x
div y
PLLODIV<2:0>
div x
32.768 kHz
PLLMULT<2:0>
PBCLK (T
PB)
UF
IN 4 MHz
PLL x24
USB Clock (48 MHz)
div 2
UPLLEN
UFRCEN
div x
UPLLIDIV<2:0>
UFIN
4 MHz FIN 5 MHz
C1
(3)
C2
(3)
XTAL
R
S
(1)
Enable
Notes: 1. A series resistor, RS, may be required for AT strip cut crystals or eliminate clipping. Alternately, to increase oscillator circuit gain,
add a parallel resistor, R
P, with a value of 1 M
2. The internal feedback resistor, R
F, is typically in the range of 2 to 10 M
3. Refer to Section 6. “Oscillator Configuration” (DS61112) in the “PIC32 Family Reference Manual” for help in determining the
best oscillator components.
4. PBCLK out is available on the OSC2 pin in certain clock modes.
5. USB PLL is available on PIC32MX2XX devices only.
OSC2
(4)
OSC1
R
F
(2)
To Internal
Logic
USB PLL
(5)
(POSC)
div 2
To A D C
SYSCLK
REFCLKI
REFCLKO
OE
To SPI
ROSEL<3:0>
POSC
FRC
LPRC
S
OSC
PBCLK
SYSCLK
XTPLL, HSPLL,
ECPLL, FRCPLL
2N
M
512
----------+
RODIV<4:0>
(N)
ROTRIM<8:0>
(M)
R
P
(1)