Datasheet

2011-2012 Microchip Technology Inc. Preliminary DS61168E-page 83
PIC32MX1XX/2XX
REGISTER 6-2: RSWRST: SOFTWARE RESET REGISTER
Bit
Range
Bit
31/23/15/7
Bit
30/22/14/6
Bit
29/21/13/5
Bit
28/20/12/4
Bit
27/19/11/3
Bit
26/18/10/2
Bit
25/17/9/1
Bit
24/16/8/0
31:24
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
23:16
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
15:8
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
7:0
U-0 U-0 U-0 U-0 U-0 U-0 U-0
W-0, HC
—SWRST
(1)
Legend: HC = Cleared by hardware
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 31-1 Unimplemented: Read as ‘0
bit 0 SWRST: Software Reset Trigger bit
(1)
1 = Enable software Reset event
0 = No effect
Note 1: The system unlock sequence must be performed before the SWRST bit can be written. Refer to Section
6. “Oscillator” (DS61112) in the “PIC32 Family Reference Manual” for details.