Datasheet

2011-2012 Microchip Technology Inc. Preliminary DS61168E-page 59
PIC32MX1XX/2XX
TABLE 4-19: PORTA REGISTER MAP
Virtual Address
(BF88_#)
Register
Name
(1)
Bit Range
Bits
All Resets
31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0
6000 ANSELA
31:16
0000
15:0
ANSA1 ANSA0 0003
6010 TRISA
31:16
0000
15:0
—TRISA10
(2)
TRISA9
(2)
TRISA8
(2)
TRISA7
(2)
TRISA4 TRISA3 TRISA2 TRISA1 TRISA0 079F
6020 PORTA
31:16
0000
15:0
—RA10
(2)
RA9
(2)
RA8
(2)
RA7
(2)
RA4 RA3 RA2 RA1 RA0 xxxx
6030 LATA
31:16
0000
15:0
—LATA10
(2)
LATA9
(2)
LATA8
(2)
LATA7
(2)
LATA4 LATA3 LATA2 LATA1 LATA0 xxxx
6040 ODCA
31:16
0000
15:0
ODCA10
(2)
ODCA9
(2)
ODCA8
(2)
ODCA7
(2)
0000
6050 CNPUA
31:16
0000
15:0
CNPUA10
(2)
CNPUA9
(2)
CNPUA8
(2)
CNPUA7
(2)
CNPUA4 CNPUA3 CNPUA2 CNPUA1 CNPUA0 0000
6060 CNPDA
31:16
0000
15:0
CNPDA10
(2)
CNPDA9
(2)
CNPDA8
(2)
CNPDA7
(2)
CNPDA4 CNPDA3 CNPDA2 CNPDA1 CNPDA0 0000
6070 CNCONA
31:16
0000
15:0 ON
—SIDL 0000
6080 CNENA
31:16
0000
15:0
CNIEA10
(2)
CNIEA9
(2)
CNIEA8
(2)
CNIEA7
(2)
CNIEA4 CNIEA3 CNIEA2 CNIEA1 CNIEA0 0000
6090 CNSTATA
31:16
0000
15:0
CNSTATA10
(2)
CNSTATA9
(2)
CNSTATA8
(2)
CNSTATA7
(2)
CNSTATA4 CNSTATA3 CNSTATA2 CNSTATA1 CNSTATA0 0000
Legend: x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Note 1: All registers in this table have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See Section 11.2 “CLR, SET and INV Registers” for
more information.
2: This bit is available on 44-pin devices only.