Datasheet

PIC32MX1XX/2XX
DS61168E-page 58 Preliminary 2011-2012 Microchip Technology Inc.
TABLE 4-17: DEVCFG: DEVICE CONFIGURATION WORD SUMMARY
Virtual Address
(BFC0_#)
Register
Name
Bit Range
Bits
All Resets
31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0
2FF0 DEVCFG3
31:16 FVBUSONIO FUSBIDIO IOL1WAY PMDL1WAY
xxxx
15:0 USERID<15:0> xxxx
2FF4 DEVCFG2
31:16
FPLLODIV<2:0> xxxx
15:0
UPLLEN
(1)
UPLLIDIV<2:0>
(1)
—FPLLMUL<2:0> FPLLIDIV<2:0> xxxx
2FF8 DEVCFG1
31:16
FWDTWINSZ<1:0> FWDTEN WINDIS WDTPS<4:0> xxxx
15:0 FCKSM<1:0> FPBDIV<1:0>
OSCIOFNC POSCMOD<1:0> IESO FSOSCEN —FNOSC<2:0>xxxx
2FFC DEVCFG0
31:16
—CP —BWP —PWP<6>xxxx
15:0 PWP<5:0>
ICESEL<1:0> JTAGEN DEBUG<1:0> xxxx
Legend: x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Note 1: This bit is available on PIC32MX2XX devices only.
TABLE 4-18: DEVICE AND REVISION ID SUMMARY
Virtual Address
(BF80_#)
Register
Name
Bit Range
Bits
All Resets
(1)
31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0
F220 DEVID
31:16 VER<3:0> DEVID<27:16> xxxx
15:0 DEVID<15:0> xxxx
Legend: x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Note 1: Reset values are dependent on the device variant.