Datasheet

ManualsBrandsMICROCHIP TECHNOLOGY ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller SSOP 28 32-Bit 40 MHz I/O number 21

PIC32MX1XX/2XX

DS61168E-page 40 Preliminary  2011-2012 Microchip Technology Inc.

4.2 Special Function Registers

Table 4-1 through Tabl e 4-2 7 contain the Special Function Register (SFR) maps for the PIC32MX1XX/2XX devices.

TABLE 4-1: BUS MATRIX REGISTER MAP

Virtual Address

(BF88_#)

Name

Bit Range

Bits

All

Resets

31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0

2000 BMXCON

(1)

31:16 — — — — — — — — — — — BMXERRIXI BMXERRICD BMXERRDMA BMXERRDS BMXERRIS 001F

15:0

— — — — — — — — —BMXWSDRM — — — BMXARB<2:0> 0041

2010 BMXDKPBA

(1)

31:16 — — — — — — — — — — — — — — — — 0000

15:0 BMXDKPBA<15:0> 0000

2020 BMXDUDBA

(1)

31:16 — — — — — — — — — — — — — — — — 0000

15:0 BMXDUDBA<15:0> 0000

2030 BMXDUPBA

(1)

31:16 — — — — — — — — — — — — — — — — 0000

15:0 BMXDUPBA<15:0> 0000

2040 BMXDRMSZ

31:16

BMXDRMSZ<31:0>

xxxx

15:0 xxxx

2050 BMXPUPBA

(1)

31:16 — — — — — — — — — — — — BMXPUPBA<19:16> 0000

15:0 BMXPUPBA<15:0> 0000

2060 BMXPFMSZ

31:16

BMXPFMSZ<31:0>

xxxx

15:0 xxxx

2070 BMXBOOTSZ

31:16

BMXBOOTSZ<31:0>

0000

15:0 0C00

Legend: x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.

Note 1: This register has corresponding CLR, SET and INV registers at its virtual address, plus an offset of 0x4, 0x8 and 0xC, respectively. See Section 11.2 “CLR, SET and INV Registers” for more information.