Datasheet

PIC32MX1XX/2XX
DS61168E-page 228 Preliminary 2011-2012 Microchip Technology Inc.
REGISTER 26-3: DEVCFG2: DEVICE CONFIGURATION WORD 2
Bit
Range
Bit
31/23/15/7
Bit
30/22/14/6
Bit
29/21/13/5
Bit
28/20/12/4
Bit
27/19/11/3
Bit
26/18/10/2
Bit
25/17/9/1
Bit
24/16/8/0
31:24
r-1 r-1 r-1 r-1 r-1 r-1 r-1 r-1
23:16
r-1 r-1 r-1 r-1 r-1 R/P R/P R/P
FPLLODIV<2:0>
15:8
R/P r-1 r-1 r-1 r-1 R/P R/P R/P
UPLLEN
(1)
UPLLIDIV<2:0>
(1)
7:0
r-1 R/P-1 R/P R/P-1 r-1 R/P R/P R/P
—FPLLMUL<2:0> FPLLIDIV<2:0>
Legend: r = Reserved bit P = Programmable bit
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 31-19 Reserved: Write ‘1
bit 18-16 FPLLODIV<2:0>: Default PLL Output Divisor bits
111 = PLL output divided by 256
110 = PLL output divided by 64
101 = PLL output divided by 32
100 = PLL output divided by 16
011 = PLL output divided by 8
010 = PLL output divided by 4
001 = PLL output divided by 2
000 = PLL output divided by 1
bit 15 UPLLEN: USB PLL Enable bit
(1)
1 = Disable and bypass USB PLL
0 = Enable USB PLL
bit 14-11 Reserved: Write1
bit 10-8 UPLLIDIV<2:0>: USB PLL Input Divider bits
(1)
111 = 12x divider
110 = 10x divider
101 = 6x divider
100 = 5x divider
011 = 4x divider
010 = 3x divider
010 = 3x divider
001 = 2x divider
000 = 1x divider
bit 7 Reserved: Write1
bit 6-4 FPLLMUL<2:0>: PLL Multiplier bits
111 = 24x multiplier
110 = 21x multiplier
101 = 20x multiplier
100 = 19x multiplier
011 = 18x multiplier
010 = 17x multiplier
001 = 16x multiplier
000 = 15x multiplier
bit 3 Reserved: Write1
Note 1: This bit is available on PIC32MX2XX devices only.