Datasheet

PIC32MX1XX/2XX
DS61168E-page 214 Preliminary 2011-2012 Microchip Technology Inc.
REGISTER 23-1: CVRCON: COMPARATOR VOLTAGE REFERENCE CONTROL REGISTER
Bit
Range
Bit
31/23/15/7
Bit
30/22/14/6
Bit
29/21/13/5
Bit
28/20/12/4
Bit
27/19/11/3
Bit
26/18/10/2
Bit
25/17/9/1
Bit
24/16/8/0
31:24
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
23:16
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
15:8
R/W-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
ON
(1)
7:0
U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
CVROE CVRR CVRSS CVR<3:0>
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 31-16 Unimplemented: Read as ‘0
bit 15 ON: Comparator Voltage Reference On bit
(1)
1 = Module is enabled
Setting this bit does not affect other bits in the register.
0 = Module is disabled and does not consume current.
Clearing this bit does not affect the other bits in the register.
bit 14-7 Unimplemented: Read as ‘0
bit 6 CVROE: CVREFOUT Enable bit
1 = Voltage level is output on CV
REFOUT pin
0 = Voltage level is disconnected from CVREFOUT pin
bit 5 CVRR: CVREF Range Selection bit
1 = 0 to 0.67 CVRSRC, with CVRSRC/24 step size
0 = 0.25 CV
RSRC to 0.75 CVRSRC, with CVRSRC/32 step size
bit 4 CVRSS: CV
REF Source Selection bit
1 = Comparator voltage reference source, CV
RSRC = (VREF+) – (VREF-)
0 = Comparator voltage reference source, CV
RSRC = AVDD – AVSS
bit 3-0 CVR<3:0>: CVREF Value Selection 0 CVR<3:0> 15 bits
When CVRR =
1:
CVREF = (CVR<3:0>/24) (CVRSRC)
When CVRR =
0:
CVREF =1/4 (CVRSRC) + (CVR<3:0>/32) (CVRSRC)
Note 1: When using 1:1 PBCLK divisor, the users software should not read/write the peripheral’s SFRs in the
SYSCLK cycle immediately following the instruction that clears the module’s ON bit.