Datasheet

2011-2012 Microchip Technology Inc. Preliminary DS61168E-page 183
PIC32MX1XX/2XX
19.0 PARALLEL MASTER PORT
(PMP)
The PMP is a parallel 8-bit input/output module
specifically designed to communicate with a wide
variety of parallel devices, such as communications
peripherals, LCDs, external memory devices and
microcontrollers. Because the interface to parallel
peripherals varies significantly, the PMP module is
highly configurable.
Key features of the PMP module include:
Fully multiplexed address/data mode
Demultiplexed or partially multiplexed address/
data mode
- up to 11 address lines with single Chip Select
- up to 12 address lines without Chip Select
One Chip Select Line
Programmable Strobe Options
- Individual Read and Write Strobes or;
- Read/Write
Strobe with Enable Strobe
Address Auto-Increment/Auto-Decrement
Programmable Address/Data Multiplexing
Programmable Polarity on Control Signals
Legacy Parallel Slave Port Support
Enhanced Parallel Slave Support
- Address Support
- 4-Byte Deep Auto-Incrementing Buffer
Programmable Wait States
Selectable Input Voltage Levels
FIGURE 19-1: PMP MODULE PINOUT AND CONNECTIONS TO EXTERNAL DEVICES
Note 1: This data sheet summarizes the features
of the PIC32MX1XX/2XX family of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 13. “Parallel
Master Port (PMP)” (DS61128) in the
“PIC32 Family Reference Manual”, which
is available from the Microchip web site
(www.microchip.com/PIC32).
2: Some registers and associated bits
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization” in
this data sheet for device-specific register
and bit information.
PMA<0>
PMA<14>
PMRD
PMWR
PMENB
PMRD/PMWR
PMCS1
PMA<1>
PMA<10:2>
PMALL
PMALH
Flash
Address Bus
Data Bus
Control Lines
PIC32MX1XX/2XX
LCD
FIFO
Microcontroller
8-bit Data (with or without multiplexed addressing)
Up to 12-bit Address
Parallel
Buffer
PMD<7:0>
Master Port
EEPROM
SRAM