Datasheet

PIC32MX1XX/2XX
DS61168E-page 132 Preliminary  2011-2012 Microchip Technology Inc.
REGISTER 10-11: U1CON: USB CONTROL REGISTER
Bit
Range
Bit
31/23/15/7
Bit
30/22/14/6
Bit
29/21/13/5
Bit
28/20/12/4
Bit
27/19/11/3
Bit
26/18/10/2
Bit
25/17/9/1
Bit
24/16/8/0
31:24
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
— — — — — — — —
23:16
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
— — — — — — — —
15:8
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
— — — — — — — —
7:0
R-x R-x R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
JSTATE SE0
PKTDIS
(4)
USBRST HOSTEN
(2)
RESUME
(3)
PPBRST
USBEN
(4)
TOKBUSY
(1,5)
SOFEN
(5)
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 31-8 Unimplemented: Read as ‘0’
bit 7 JSTATE: Live Differential Receiver JSTATE flag bit
1 = JSTATE detected on the USB
0 = No JSTATE detected
bit 6 SE0: Live Single-Ended Zero flag bit
1 = Single Ended Zero detected on the USB
0 = No Single Ended Zero detected
bit 5 PKTDIS: Packet Transfer Disable bit
(4)
1 = Token and packet processing disabled (set upon SETUP token received)
0 = Token and packet processing enabled
TOKBUSY: Token Busy Indicator bit
(1,5)
1 = Token being executed by the USB module
0 = No token being executed
bit 4 USBRST: Module Reset bit
(5)
1 = USB reset generated
0 = USB reset terminated
bit 3 HOSTEN: Host Mode Enable bit
(2)
1 = USB host capability enabled
0 = USB host capability disabled
bit 2 RESUME: RESUME Signaling Enable bit
(3)
1 = RESUME signaling activated
0 = RESUME signaling disabled
Note 1: Software is required to check this bit before issuing another token command to the U1TOK register (see
Register 10-15).
2: All host control logic is reset any time that the value of this bit is toggled.
3: Software must set RESUME for 10 ms if the part is a function, or for 25 ms if the part is a host, and then
clear it to enable remote wake-up. In Host mode, the USB module will append a low-speed EOP to the
RESUME signaling when this bit is cleared.
4: Device mode.
5: Host mode.