Datasheet

PIC32MX1XX/2XX
DS61168E-page 12 Preliminary  2011-2012 Microchip Technology Inc.
Pin Diagrams (Continued)
44-Pin VTLA
(1,2,3)
= Pins are up to 5V tolerant
Note 1: The RPn pins can be used by remappable peripherals. See Table 1 for the available peripherals and Section 11.3 “Peripheral
Pin Select” for restrictions.
2: Every I/O port pin (RAx-RCx) can be used as a change notification pin (CNAx-CNCx). See Section 11.0 “I/O Ports” for more
information.
3: The metal plane at the bottom of the device is not connected to any pins and is recommended to be connected to V
SS externally.
4: This pin function is available on PIC32MX130F064D and PIC32MX150F128D devices only.
RPB8/SCL1/CTED10/PMD4/RB8 RPB7/CTED3/PMD5/INT0/RB7 PGEC3/RPB6/PMD6/RB6 PGED3/RPB5/PMD7/RB5 V
DD
VSS RPC5/PMA3/RC5 RPC4/PMA4/RC4 RPC3/RC3 TDI/RPA9/PMA9/RA9 SOSCO/RPA4/T1CK/CTED9/RA4
RPB9/SDA1/CTED4/PMD3/RB9
SOSCI/RPB4/RB4
RPC6/PMA1/RC6
TDO/RPA8/PMA8/RA8
RPC7/PMA0/RC7
OSC2/CLKO/RPA3/RA3
RPC8/PMA5/RC8
OSC1/CLKI/RPA2/RA2
RPC9/CTED7/PMA6/RC9
V
SS
VSS
PIC32MX110F016D
VDD
VCAP
AN8/RPC2/PMA2/RC2
PGED2/RPB10/CTED11/PMD2/RB10
AN7/RPC1/RC1
PGEC2/RPB11/PMD1/RB11
AN6/RPC0/RC0
AN12/PMD0/RB12
AN5/C1INA/C2INC/RTCC/RPB3/SCL2/RB3
AN4/C1INB/C2IND/RPB2/SDA2/CTED13/RB2
PGEC
(4)
/TCK/CTED8/PMA7/RA7
C
VREFOUT/AN10/C3INB/RPB14/SCK1/CTED5/PMWR/RB14
AN9/C3INA/RPB15/SCK2/CTED6/PMCS1/RB15
AV
SS
AVDD
MCLR
VREF+/CVREF+/AN0/C3INC/RPA0/CTED1/RA0
V
REF-/CVREF-/AN1/RPA1/CTED2/RA1
PGED1/AN2/C1IND/C2INB/C3IND/RPB0/RB0
PIC32MX120F032D
1
10
33
32
31
30
29
28
2
3
4
5
6
24
23
2221201911 12 13 14 15
7
8
9
343536
16 17 18
27
26
25
3738394041424344
PGEC1/AN3/C1INC/C2INA/RPB1/CTED12/RB1
AN11/RPB13/CTPLS/PMRD/RB13
PIC32MX130F064D
PIC32MX150F128D
PGED
(4)
/TMS/PMA10/RA10