Datasheet

PIC24HJ32GP302/304, PIC24HJ64GPX02/X04 AND PIC24HJ128GPX02/X04
DS70293G-page 90 © 2007-2012 Microchip Technology Inc.
REGISTER 7-14: IEC4: INTERRUPT ENABLE CONTROL REGISTER 4
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
bit 15 bit 8
U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 U-0
—C1TXIE
(1)
DMA7IE DMA6IE CRCIE U2EIE U1EIE
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-7 Unimplemented: Read as ‘0
bit 6 C1TXIE: ECAN1 Transmit data request Interrupt Enable bit
(1)
1 = Interrupt request occurred
0 = Interrupt request not occurred
bit 5 DMA7IE: DMA Channel 7 Data Transfer Complete Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
bit 4 DMA6IE: DMA Channel 6 Data Transfer Complete Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
bit 3 CRCIE: CRC Generator Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
bit 2 U2EIE: UART2 Error Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
bit 1 U1EIE: UART1 Error Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
bit 0 Unimplemented: Read as ‘0
Note 1: Interrupts disabled on devices without ECAN™ modules.