Information

PIC24HJ32GP202/204 and PIC24HJ16GP304
DS80339D-page 2 © 2008 Microchip Technology Inc.
11. I
2
C Module: 10-bit Addressing Mode
When the I
2
C module is configured for 10-bit
addressing using the same address bits (A10 and
A9) as other I
2
C device A10 and A9 bits may not
work as expected.
12. Product Identification
Revision A2 devices marked as extended temper-
ature range (E) devices, support only industrial
temperature range (I).
13. UART (UxE Interrupt)
The UART error interrupt may not occur, or may
occur at an incorrect time, if multiple errors occur
during a short period of time.
14. UART Module
When the UART module is operating in 8-bit mode
(PDSEL = 0x) and using the IrDA
®
encoder/
decoder (IREN = 1), the module incorrectly
transmits a data payload of 80h as 00h.
15. Internal Voltage Regulator
When the VREGS (RCON<8>) bit is set to a logic
‘0’ higher sleep current may be observed.
16. PSV Operations
An address error trap occurs in certain addressing
modes when accessing the first four bytes of any
PSV page.
17. I
2
C Module: 10-bit Addressing Mode
When the I
2
C module is configured as a 10-bit
slave with an address of 0x102, the I2CxRCV
register content for the lower address byte is 0x01
rather than 0x02.
18. I
2
C Module
With the I
2
C module enabled, the PORT bits and
external Interrupt Input functions (if any)
associated with SCL and SDA pins will not reflect
the actual digital logic levels on the pins.
19. I
2
C Module: 10-bit Addressing Mode
The 10-bit slave does not set the RBF flag or load
the I2CxRCV register, on address match if the
Least Significant bits (LSbs) of the address are the
same as the 7-bit reserved addresses.
The following sections describe the errata and work
around to these errata, where they may apply.
1. Module: JTAG Programming
JTAG programming does not work.
Work around
None.
2. Module: UART
The auto-baud feature may not calculate the
correct baud rate when the High Baud Rate Enable
bit, BRGH, is set. With the BRGH bit set, the baud
rate calculation used is the same as BRG = 0.
Work around
If the auto-baud feature is needed, use the Low
Baud Rate mode by clearing the BRGH bit.
3. Module: UART
With the auto-baud feature selected, the Sync
Break character (0x55) may be loaded into the
FIFO as data.
Work around
To prevent the Sync Break character from being
loaded into the FIFO, load the UxBRG register with
either 0x0000 or 0xFFFF prior to enabling the
auto-baud feature (ABAUD = 1).
4. Module: UART
The auto-baud feature may miscalculate for
certain baud rate and clock speed combinations,
resulting in a BRG value that is greater than or less
than the expected value by 1. This may result in
reception or transmission failures.
Work around
Test the auto-baud rate at various clock speed and
baud rate combinations that would be used in an
application. If an inaccurate BRG value is
generated, manually correct the baud rate in user
software.
5. Module: UART
When an auto-baud is detected, the receive
interrupt may occur twice. The first interrupt occurs
at the beginning of the Start bit and the second
after reception of the Sync field character.
Work around
If an extra interrupt is detected, ignore the
additional interrupt.