Datasheet

PIC24HJXXXGPX06/X08/X10
DS80280G-page 12 © 2008 Microchip Technology Inc.
30. Module: SPI
SPI1 functionality for pin 34 (U1RX/SDI1/RF2) is
enabled by the SPI2 module. As a result, two side
effects occur:
1. RF2 functionality is disabled if the SPI2 module
is enabled.
2. This pin will not function as SDI1 if the SPI1
module is enabled.
This issue affects 64-pin devices only:
• PIC24HJ64GP206
• PIC24HJ128GP206
• PIC24HJ256GP206
• PIC24HJ128GP306
• PIC24HJ64GP506
• PIC24HJ128GP506
Work around
Two conditions apply:
1. If the SPI2 module is used, pin 34 cannot be
used as an I/O (RF2). It is recommended to
use another I/O pin.
2. If the SPI1 module is used, the SPI2 module
must also be enabled to gain SDI1 functionality
on pin 34. As an alternative, I/O (RF2) can be
configured as an input, which will allow pin 34
to function as SDI1.
31. Module: UART
The auto-baud feature may miscalculate for
certain baud rate and clock speed combinations,
resulting in a BRG value that is greater than or less
than the expected value by 1. This may result in
reception or transmission failures.
Work around
Test the auto-baud rate at various clock speed and
baud rate combinations that would be used in an
application. If an inaccurate BRG value is
generated, manually correct the baud rate in user
software.
32. Module: Device ID Register
On a few devices, the content of the Device ID
register can change from the factory programmed
default value immediately after RTSP or ICSP™
Flash programming.
As a result, development tools will not recognize
these devices and will generate an error message
indicating that the device ID and the device part
number do not match. Additionally, some
peripherals will be reconfigured and will not
function as described in the device data sheet.
Refer to Section 5. “Flash Programming”
(DS70191), of the “dsPIC33F Family Reference
Manual” for an explanation of RTSP and ICSP
Flash programming.
Work around
All RTSP and ICSP Flash programming routines
must be modified as follows:
1. No word programming is allowed. Any word
programming must be replaced with row
programming.
2. During row programming, load write latches as
described in 5.4.2.3 “Loading Write Latches”
of Section 5. “Flash Programming”
(DS70191).
3. After latches are loaded, reload any latch
location (in a given row) that has 5 LSB set to
0x18, with the original data. For example,
reload one of the following latch locations with
the desired data:
0xXXXX18, 0xXXXX38, 0xXXXX58,
0xXXXX78, 0xXXXX98, 0xXXXXB8,
0xXXXXD8, 0xXXXXF8
4. Start row programming by setting
NVMOP<3:0> = ‘0001’ (memory row program
operation) in the NVMCON register.
5. After row programming is complete, verify the
contents of Flash memory.
6. If Flash verification errors are found, repeat
steps 2 through 5. If Flash verification errors
are found after a second iteration, report this
problem to Microchip.
Steps 1 through 5 in the work around are
implemented in MPLAB IDE version 8.00 or higher
for the MPLAB ICD 2, MPLAB REAL ICE™
in-circuit emulator and PM3 tools.