Datasheet

© 2009 Microchip Technology Inc. DS70175H-page 29
PIC24HJXXXGPX06/X08/X10
FIGURE 4-4: DATA MEMORY MAP FOR PIC24HJXXXGPX06/X08/X10 DEVICES WITH 16 KBS
RAM
4.2.5 DMA RAM
Every PIC24HJXXXGPX06/X08/X10 device contains 2
Kbytes of dual ported DMA RAM located at the end of
data space. Memory locations in the DMA RAM space
are accessible simultaneously by the CPU and the DMA
controller module. DMA RAM is utilized by the DMA
controller to store data to be transferred to various
peripherals using DMA, as well as data transferred from
various peripherals using DMA. The DMA RAM can be
accessed by the DMA controller without having to steal
cycles from the CPU.
When the CPU and the DMA controller attempt to
concurrently write to the same DMA RAM location, the
hardware ensures that the CPU is given precedence in
accessing the DMA RAM location. Therefore, the DMA
RAM provides a reliable means of transferring DMA
data without ever having to stall the CPU.
0x0000
0x07FE
0xFFFE
LSB
Address
16 bits
LSBMSB
MSB
Address
0x0001
0x07FF
0xFFFF
Optionally
Mapped
into Program
Memory
0x47FF 0x47FE
0x0801
0x0800
Near
Data
2 Kbyte
SFR Space
16 Kbyte
SRAM Space
8 Kbyte
Space
0x8001
0x8000
0x48000x4801
0x3FFE
0x4000
0x3FFF
0x4001
0x1FFE
0x1FFF
SFR Space
X Data
Unimplemented (X)
DMA RAM
X Data RAM (X)
Note: DMA RAM can be used for general
purpose data storage if the DMA function
is not required in an application.