Datasheet

PIC24HJXXXGPX06/X08/X10
DS70175H-page 214 © 2009 Microchip Technology Inc.
TABLE 21-2: PIC24HJXXXGPX06/X08/X10 CONFIGURATION BITS DESCRIPTION
Bit Field Register Description
BWRP FBS Boot Segment Program Flash Write Protection
1 = Boot segment may be written
0 = Boot segment is write-protected
BSS<2:0> FBS Boot Segment Program Flash Code Protection Size
X11 = No Boot program Flash segment
Boot space is 1K IW less VS
110 = Standard security; boot program Flash segment starts at End of VS,
ends at 0x0007FE
010 = High security; boot program Flash segment starts at End of VS, ends at
0x0007FE
Boot space is 4K IW less VS
101 = Standard security; boot program Flash segment starts at End of VS,
ends at 0x001FFE
001 = High security; boot program Flash segment starts at End of VS, ends at
0x001FFE
Boot space is 8K IW less VS
100 = Standard security; boot program Flash segment starts at End of VS,
ends at 0x003FFE
000 = High security; boot program Flash segment starts at End of VS, ends at
0x003FFE
RBS<1:0> FBS Boot Segment RAM Code Protection
11 = No Boot RAM defined
10 = Boot RAM is 128 Bytes
01 = Boot RAM is 256 Bytes
00 = Boot RAM is 1024 Bytes
SWRP FSS Secure Segment Program Flash Write Protection
1 = Secure segment may be written
0 = Secure segment is write-protected