Information
PIC24HJ12GP201/202
DS80326D-page 4 © 2008 Microchip Technology Inc.
15. Module: UART (UxE Interrupt)
The UART error interrupt may not occur, or may
occur at an incorrect time, if multiple errors occur
during a short period of time.
Work around
Read the error flags in the UxSTA register when-
ever a byte is received to verify the error status. In
most cases, these bits will be correct, even if the
UART error interrupt fails to occur.
16. Module: UART (IrDA
®
)
When the UART is operating in 8-bit mode
(PDSEL = 0x) and using the IrDA encoder/decoder
(IREN = 1), the module incorrectly transmits a data
payload of 80h as 00h.
Work around
None.
17. Module: Internal Voltage Regulator
When the VREGS (RCON<8>) bit is set to a logic
‘0’, higher sleep current may be observed.
Work around
Ensure VREGS (RCON<8>) bit is set to a logic ‘1’
for device Sleep mode operation.
18. Module: PSV Operations
An address error trap occurs in certain addressing
modes when accessing the first four bytes of an
PSV page. This only occurs when using the
following addressing modes:
•MOV.D
• Register indirect addressing (word or byte
mode) with pre/post-decrement
Work around
Do not perform PSV accesses to any of the first
four bytes using the above addressing modes. For
applications using the C language, MPLAB C30
version 3.11 or higher, provides the following com-
mand-line switch that implements a work around
for the erratum.
-merrata=psv_trap
Refer to the readme.txt file in the MPLAB C30
v3.11 tool suite for further details.
19. Module: I
2
C
When the I
2
C module is configured as a 10-bit
slave with and address of 0x102, the I2CxRCV
register content for the lower address byte is 0x01
rather than 0x02; however, the module
acknowledges both address bytes.
Work around
None.
20. Module: I
2
C
With the I
2
C module enabled, the port bits and
external interrupt input functions (if any)
associated with the SCL and SDA pins do not
reflect the actual digital logic levels on the pins.
Work around
If the SDA and/or SCL pins need to be polled,
these pins should be connected to other port pins
in order to be read correctly. This issue does not
affect the operation of the I
2
C module.
21. Module: I
2
C
In 10-bit Addressing mode, some address
matches don’t set the RBF flag or load the receive
register, I2CxRCV, if the lower address byte
matches the reserved addresses. In particular,
these include all addresses with the form
XX0000XXXX and XX1111XXXX, with the
following exceptions:
• 001111000X
• 011111001X
• 101111010X
• 111111011X
Work around
Ensure that the lower address byte in 10-bit
Addressing mode does not match any 7-bit
reserved addresses.