Datasheet

© 2007-2011 Microchip Technology Inc. DS70282E-page 247
PIC24HJ12GP201/202
Section 14.0 “Serial
Peripheral Interface (SPI)”
Removed the following sections, which are now available in the related section of
the “PIC24H Family Reference Manual”:
• 14.1 “Interrupts”
• 14.2 “Receive Operations”
• 14.3 “Transmit Operations”
• 14.4 “SPI Setup” (retained Figure 14-1: SPI Module Block Diagram)
Section 15.0 “Inter-Integrated
Circuit™ (I
2
C)”
Removed the following sections, which are now available in the related section of
the “PIC24H Family Reference Manual”:
• 15.3 “I
2
C Interrupts”
• 15.4 “Baud Rate Generator” (retained Figure 15-1: I
2
C Block Diagram)
• 15.5 “I
2
C Module Addresses
• 15.6 “Slave Address Masking”
• 15.7 “IPMI Support”
• 15.8 “General Call Address Support”
• 15.9 “Automatic Clock Stretch”
• 15.10 “Software Controlled Clock Stretching (STREN = 1)”
• 15.11 “Slope Control”
• 15.12 “Clock Arbitration”
• 15.13 “Multi-Master Communication, Bus Collision, and Bus Arbitration
• 15.14 “Peripheral Pin Select Limitations
Section 16.0 “Universal
Asynchronous Receiver
Transmitter (UART)”
Removed the following sections, which are now available in the related section of
the “PIC24H Family Reference Manual”:
• 16.1 “UART Baud Rate Generator”
• 16.2 “Transmitting in 8-bit Data Mode
• 16.3 “Transmitting in 9-bit Data Mode
• 16.4 “Break and Sync Transmit Sequence”
• 16.5 “Receiving in 8-bit or 9-bit Data Mode”
• 16.6 “Flow Control Using UxCTS
and UxRTS Pins”
• 16.7 “Infrared Support”
Removed IrDA references and Note 1, and updated the bit and bit value
descriptions for UTXINV (UxSTA<14>) in the UARTx Status and Control Register
(see Register 16-2).
TABLE 23-1: MAJOR SECTION UPDATES
Section Name Update Description