Datasheet
2010 Microchip Technology Inc. DS39940D-page 221
PIC24FJ64GB004 FAMILY
bit 1-0 PPB<1:0>: Ping-Pong Buffers Configuration bit
11 = EVEN/ODD ping-pong buffers are enabled for Endpoints 1 to 15
10 = EVEN/ODD ping-pong buffers are enabled for all endpoints
01 = EVEN/ODD ping-pong buffers are enabled for OUT Endpoint 0
00 = EVEN/ODD ping-pong are buffers are disabled
REGISTER 18-12: U1CNFG1: USB CONFIGURATION REGISTER 1 (CONTINUED)
Note 1: This bit is only active when the UTRDIS bit (U1CNFG2<0>) is set.
REGISTER 18-13: U1CNFG2: USB CONFIGURATION REGISTER 2
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
— — — — — — — —
bit 15 bit 8
U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
— —
UVCMPSEL PUVBUS EXTI2CEN
UVBUSDIS
(1)
UVCMPDIS
(1)
UTRDIS
(1)
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-6 Unimplemented: Read as ‘0’
bit 5
UVCMPSEL: External Comparator Input Mode Select bit (see Table 18-3)
When UVCMPDIS is set:
1 = Use 3 pin input for external comparators
0 = Use 2 pin input for external comparators
bit 4 PUVBUS: V
BUS Pull-up Enable bit
1 = Pull-up on VBUS pin is enabled
0 = Pull-up on V
BUS pin is disabled
bit 3 EXTI2CEN: I
2
C™ Interface For External Module Control Enable bit
1 = External module(s) is controlled via I
2
C interface
0 = External module(s) is controlled via dedicated pins
bit 2 UVBUSDIS: On-Chip 5V Boost Regulator Builder Disable bit
(1)
1 = On-chip boost regulator builder is disabled; digital output control interface is enabled
0 = On-chip boost regulator builder is active
bit 1 UVCMPDIS: On-Chip V
BUS Comparator Disable bit
(1)
1 = On-chip charge VBUS comparator is disabled; digital input status interface is enabled
0 = On-chip charge V
BUS comparator is active
bit 0 UTRDIS: On-Chip Transceiver Disable bit
(1)
1 = On-chip transceiver is disabled; digital transceiver interface is enabled
0 = On-chip transceiver is active
Note 1: Never change these bits while the USBPWR bit is set (U1PWRC<0> = 1).