Datasheet

PIC24FJ64GB004 FAMILY

DS39940D-page 212  2010 Microchip Technology Inc.

18.7 USB OTG Module Registers

There are a total of 37 memory mapped registers asso-

ciated with the USB OTG module. They can be divided

into four general categories:

• USB OTG Module Control (12)

• USB Interrupt (7)

• USB Endpoint Management (16)

• USB VBUS Power Control (2)

This total does not include the (up to) 128 BD registers

in the BDT. Their prototypes, described in

in Section 18.2 “USB Buffer Descriptors and the

BDT”.

With the exception U1PWMCON and U1PWMRRS, all

USB OTG registers are implemented in the Least Sig-

nificant Byte of the register. Bits in the upper byte are

unimplemented, and have no function. Note that some

registers are instantiated only in Host mode, while

other registers have different bit instantiations and

functions in Device and Host modes.

Registers described in the following sections are those

that have bits with specific control and configuration

features. The following registers are used for data or

address values only:

• U1BDTP1: Specifies the 256-word page in data

RAM used for the BDT; 8-bit value with bit 0 fixed

as ‘0’ for boundary alignment

• U1FRML and U1FRMH: Contains the 11-bit byte

counter for the current data frame

• U1PWMRRS: Contains the 8-bit value for PWM

duty cycle (bits<15:8>) and PWM period

(bits<7:0>) for the V

BUS boost assist PWM

module.