Datasheet

 2010-2011 Microchip Technology Inc. DS39996F-page 295
PIC24FJ128GA310 FAMILY
24.0 12-BIT A/D CONVERTER WITH
THRESHOLD SCAN
The 12-bit A/D Converter has the following key
features:
• Successive Approximation Register (SAR)
Conversion
• Conversion Speeds of up to 200 ksps
• Up to 32 Analog Input Channels (internal and
external)
• Selectable 10-Bit or 12-Bit (default) Conversion
Resolution
• Multiple Internal Reference Input Channels
• External Voltage Reference Input Pins
• Unipolar Differential Sample-and-Hold (S/H)
Amplifier
• Automated Threshold Scan and Compare
Operation to Pre-Evaluate Conversion Results
• Selectable Conversion Trigger Source
• Fixed Length (one word per channel),
Configurable Conversion Result Buffer
• Four Options for Results Alignment
• Configurable Interrupt Generation
• Enhanced DMA Operations with Indirect Address
Generation
• Operation During CPU Sleep and Idle modes
The 12-bit A/D Converter module is an enhanced ver-
sion of the 10-bit module offered in earlier PIC24
devices. It is a Successive Approximation Register
(SAR) Converter, enhanced with 12-bit resolution, a
wide range of automatic sampling options, tighter inte-
gration with other analog modules and a configurable
results buffer.
It also includes a unique Threshold Detect feature that
allows the module itself to make simple decisions
based on the conversion results, and enhanced opera-
tion with the DMA Controller through Peripheral Indirect
Addressing (PIA).
A simplified block diagram for the module is shown in
Figure 24-1.
24.1 Basic Operation
To perform a standard A/D conversion:
1. Configure the module:
a) Configure port pins as analog inputs by
setting the appropriate bits in the ANSELn
registers (see Section 11.2 “Configuring
Analog Port Pins (ANSx)” for more
information).
b) Select the voltage reference source to
match expected range on analog inputs
(AD1CON2<15:13>).
c) Select the positive and negative multiplexer
inputs for each channel (AD1CHS<15:0>).
d) Select the analog conversion clock to match
the desired data rate with the processor
clock (AD1CON3<7:0>).
e) Select the appropriate sample/conversion
sequence (AD1CON1<7:5> and
AD1CON3<12:8>).
f) For Channel A scanning operations, select
the positive channels to be included
(AD1CSSH and AD1CSSL registers).
g) Select how conversion results are
presented in the buffer (AD1CON1<9:8>
and AD1CON5 register).
h) Select the interrupt rate (AD1CON2<5:2>).
i) Turn on A/D module (AD1CON1<15>).
2. Configure the A/D interrupt (if required):
a) Clear the AD1IF bit (IFS0<13>).
b) Enable the AD1IE interrupt (IEC0<13>).
c) Select the A/D interrupt priority (IPC3<6:4>).
3. If the module is configured for manual sampling,
set the SAMP bit (AD1CON1<1>) to begin
sampling.
Note: This data sheet summarizes the features
of this group of PIC24F devices. It is not
intended to be a comprehensive refer-
ence source. For more information on the
12-Bit A/D Converter, refer to the “PIC24F
Family Reference Manual”, Section 51.
“12-Bit A/D Converter with Threshold
Detect” (DS39739).