Datasheet

PIC24FJ128GA310 FAMILY
PIC24FJDS39996F-page 22  2010-2011 Microchip Technology Inc.
PMD0 60 76 93 A4 I/O ST/TTL Parallel Master Port Data (Demultiplexed Master
mode) or Address/Data (Multiplexed Master modes).
PMD1 61 77 94 B4 I/O ST/TTL
PMD2 62 78 98 B3 I/O ST/TTL
PMD3 63 79 99 A2 I/O ST/TTL
PMD4 64 80 100 A1 I/O ST/TTL
PMD5 1 1 3 D3 I/O ST/TTL
PMD6 2 2 4 C1 I/O ST/TTL
PMD7 3 3 5 D2 I/O ST/TTL
PMD8 — 75 90 A5 I/O ST/TTL
PMD9 — 74 89 E6 I/O ST/TTL
PMD10 — 73 88 A6 I/O ST/TTL
PMD11 — 72 87 B6 I/O ST/TTL
PMD12 — 64 79 A9 I/O ST/TTL
PMD13 — 65 80 D8 I/O ST/TTL
PMD14 — 68 83 D7 I/O ST/TTL
PMD15 — 69 84 C7 I/O ST/TTL
PMRD 53 67 82 B8 O — Parallel Master Port Read Strobe.
PMWR 52 66 81 C8 O — Parallel Master Port Write Strobe.
RA0 — — 17 G3 I/O ST PORTA Digital I/O.
RA1 — — 38 J6 I/O ST
RA2 — — 58 H11 I/O ST
RA3 — — 59 G10 I/O ST
RA4 — — 60 G11 I/O ST
RA5 — — 61 G9 I/O ST
RA6 — — 91 C5 I/O ST
RA7 — — 92 B5 I/O ST
RA9 — 23 28 L2 I/O ST
RA10 — 24 29 K3 I/O ST
RA14 — 52 66 E11 I/O ST
RA15 — 53 67 E8 I/O ST
TABLE 1-4: PIC24FJ128GA310 FAMILY PINOUT DESCRIPTIONS (CONTINUED)
Pin
Function
Pin Number/Grid Locator
I/O
Input
Buffer
Description
64-Pin
TQFP
80-Pin
TQFP
100-Pin
TQFP
121-Pin
BGA
Legend: TTL = TTL input buffer ST = Schmitt Trigger input buffer
ANA = Analog level input/output I
2
C™ = I
2
C/SMBus input buffer