Datasheet

PIC24FJ128GA310 FAMILY
PIC24FJDS39996F-page 20  2010-2011 Microchip Technology Inc.
COM0 63 79 99 A2 O — LCD Driver Common Outputs.
COM1 62 78 98 B3 O —
COM2 61 77 94 B4 O —
COM3 60 76 93 A4 O —
COM4 59 73 88 A6 O —
COM5 23 29 34 L5 O —
COM6 22 28 33 L4 O —
COM7 21 27 32 K4 O —
CS1 45 57 71 C11 I/O ST/TTL Parallel Master Port Chip Select 1 Strobe (shared
with PMA14)
CS2 44 56 70 D11 O — Parallel Master Port Chip Select 2 Strobe (shared
with PMA15)
CTCMP 14 18 23 J2 I ANA CTMU Comparator 2 Input (Pulse mode).
CTED0 — — 17 G3 I ANA CTMU External Edge Inputs.
CTED1 283442L7 IANA
CTED2 273341J7 IANA
CTED3 — — 1 B2 I ANA
CTED4 1 1 3 D3 I ANA
CTED5 293543K7 IANA
CTED6 303644L8 IANA
CTED7 — — 40 47 I ANA
CTED8 64 80 100 A1 I ANA
CTED9 637999A2 IANA
CTED10 — — 97 A3 I ANA
CTED11 — — 95 C4 I ANA
CTED12 15 19 24 K1 I ANA
CTED13 14 18 23 J2 I ANA
CTPLS 29 35 43 K7 O — CTMU Pulse Output.
CV
REF 23 29 34 L5 O — Comparator Voltage Reference Output.
CV
REF+ 16 20 25 K2 I ANA Comparator/A/D Reference Voltage (low) Input.
CV
REF- 15 19 24 K1 I ANA Comparator/A/D Reference Voltage (high) Input.
INT0 35 45 55 H9 I ST External Interrupt Input 0.
LCDBIAS0 3 3 5 D2 I ANA Bias Inputs for LCD Driver Charge Pump.
LCDBIAS1 2 2 4 C1 I ANA
LCDBIAS2 1 1 3 D3 I ANA
LCDBIAS3 17 21 26 L1 I ANA
LVDIN 64 80 100 A1 I ANA Low-Voltage Detect Input.
MCLR
7 9 13 F1 I ST Master Clear (device Reset) Input. This line is
brought low to cause a Reset.
OSCI 39 49 63 F9 I ANA Main Oscillator Input Connection.
OSCO 40 50 64 F11 O — Main Oscillator Output Connection.
TABLE 1-4: PIC24FJ128GA310 FAMILY PINOUT DESCRIPTIONS (CONTINUED)
Pin
Function
Pin Number/Grid Locator
I/O
Input
Buffer
Description
64-Pin
TQFP
80-Pin
TQFP
100-Pin
TQFP
121-Pin
BGA
Legend: TTL = TTL input buffer ST = Schmitt Trigger input buffer
ANA = Analog level input/output I
2
C™ = I
2
C/SMBus input buffer