Datasheet

PIC24FJ128GA310 FAMILY
DS39996F-page 114  2010-2011 Microchip Technology Inc.
REGISTER 8-14: IEC1: INTERRUPT ENABLE CONTROL REGISTER 1
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
U2TXIE U2RXIE INT2IE
(1)
T5IE T4IE OC4IE OC3IE DMA2IE
bit 15 bit 8
U-0 R/W-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
—IC7IE—INT1IE
(1)
CNIE CMIE MI2C1IE SI2C1IE
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 U2TXIE: UART2 Transmitter Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
bit 14 U2RXIE: UART2 Receiver Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
bit 13 INT2IE: External Interrupt 2 Enable bit
(1)
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
bit 12 T5IE: Timer5 Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
bit 11 T4IE: Timer4 Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
bit 10 OC4IE: Output Compare Channel 4 Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
bit 9 OC3IE: Output Compare Channel 3 Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
bit 8 DMA2IE: DMA Channel 2 Interrupt Flag Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
bit 7 Unimplemented: Read as ‘0’
bit 6 IC7IE: Input Capture Channel 7 Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
bit 5 Unimplemented: Read as ‘0’
bit 4 INT1IE: External Interrupt 1 Enable bit
(1)
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
Note 1: If an external interrupt is enabled, the interrupt input must also be configured to an available RPx or RPIx
pin. See Section 11.4 “Peripheral Pin Select (PPS)” for more information.