Datasheet

PIC24FJ64GA104 FAMILY
DS39951C-page 62  2010 Microchip Technology Inc.
TABLE 6-3: RESET DELAY TIMES FOR VARIOUS DEVICE RESETS
Reset Type Clock Source SYSRST Delay
System Clock
Delay
Notes
POR
(6)
EC TPOR + TRST + TPWRT — 1, 2, 3, 8
FRC, FRCDIV TPOR + TRST + TPWRT TFRC 1, 2, 3, 4, 7, 8
LPRC T
POR + TRST + TPWRT TLPRC 1, 2, 3, 4, 8
ECPLL TPOR + TRST + TPWRT TLOCK 1, 2, 3, 5, 8
FRCPLL TPOR + TRST + TPWRT TFRC + TLOCK 1, 2, 3, 4, 5, 7, 8
XT, HS, SOSC T
POR+ TRST + TPWRT TOST 1, 2, 3, 6, 8
XTPLL, HSPLL TPOR + TRST + TPWRT TOST + TLOCK 1, 2, 3, 5, 6, 8
BOR EC TRST + TPWRT — 2, 3, 8
FRC, FRCDIV T
RST + TPWRT TFRC 2, 3, 4, 7, 8
LPRC TRST + TPWRT TLPRC 2, 3, 4, 8
ECPLL TRST + TPWRT TLOCK 2, 3, 5, 8
FRCPLL T
RST + TPWRT TFRC + TLOCK 2, 3, 4, 5, 7, 8
XT, HS, SOSC T
RST + TPWRT TOST 2, 3, 6, 8
XTPLL, HSPLL TRST + TPWRT TFRC + TLOCK 2, 3, 4, 5, 8
All Others Any Clock T
RST — 2, 8
Note 1: TPOR = Power-on Reset delay.
2: TRST = Internal State Reset time.
3: T
PWRT = 64 ms nominal if regulator is disabled (DISVREG tied to VDD).
4: TFRC and TLPRC = RC Oscillator start-up times.
5: TLOCK = PLL lock time.
6: T
OST = Oscillator Start-up Timer (OST). A 10-bit counter waits 1024 oscillator periods before releasing the
oscillator clock to the system.
7: If Two-Speed Start-up is enabled, regardless of the Primary Oscillator selected, the device starts with
FRC, and in such cases, FRC start-up time is valid.
8: T
RST = Configuration setup time.
Note: For detailed operating frequency and timing specifications, see Section 28.0 “Electrical Characteristics”.