Datasheet

PIC24FJ64GA104 FAMILY
DS39951C-page 300  2010 Microchip Technology Inc.
CRC
Registers................................................................... 215
Typical Operation......................................................215
User Interface ........................................................... 214
Data .................................................................. 214
Polynomial ........................................................ 214
CTMU
Measuring Capacitance ............................................235
Measuring Time ........................................................ 236
Pulse Generation and Delay ..................................... 236
Customer Change Notification Service ............................. 303
Customer Notification Service........................................... 303
Customer Support ............................................................. 303
D
Data Memory
Address Space............................................................ 33
Memory Map ............................................................... 33
Near Data Space ........................................................ 34
SFR Space.................................................................. 34
Software Stack............................................................ 47
Space Organization and Alignment ............................ 34
DC Characteristics
Comparator Specifications........................................ 276
Comparator Voltage Reference Specifications ......... 276
I/O Pin Input Specifications....................................... 274
I/O Pin Output Specifications ....................................275
Idle Current ............................................................... 269
Internal Voltage Regulator Specifications ................. 276
Operating Current ..................................................... 267
Power-Down Base Current .......................................271
Power-Down Peripheral Module Current (I
PD).......... 272
Program Memory ...................................................... 275
Temperature and Voltage Specifications .................. 266
Deep Sleep Watchdog Timer (DSWDT) ........................... 248
Development Support ....................................................... 251
DISVREG Pin....................................................................246
E
Electrical Characteristics
Absolute Maximum Ratings ...................................... 263
Thermal Operating Conditions .................................. 265
Thermal Packaging ................................................... 265
V/F Graph (Extended Temperature) ......................... 264
V/F Graph (Industrial) ............................................... 264
Equations
A/D Conversion Clock Period ................................... 227
Baud Rate Reload Calculation.................................. 177
Calculating the PWM Period ..................................... 159
Calculation for Maximum PWM Resolution............... 159
Relationship Between Device and SPI
Clock Speed...................................................... 174
UART Baud Rate with BRGH = 0 ............................. 184
UART Baud Rate with BRGH = 1 ............................. 184
Errata .................................................................................... 8
Examples
Baud Rate Error Calculation (BRGH = 0) ................. 184
F
Flash Configuration Words ................................. 32, 239–244
Flash Program Memory ...................................................... 51
and Table Instructions ................................................ 51
Enhanced ICSP Operation ......................................... 52
JTAG Operation.......................................................... 52
Programming Algorithm .............................................. 54
RTSP Operation ......................................................... 52
Single-Word Programming ......................................... 57
I
I/O Ports
Analog Input Voltage Considerations ....................... 122
Analog Port Pins Configuration................................. 122
Input Change Notification ......................................... 123
Open-Drain Configuration......................................... 122
Parallel (PIO) ............................................................ 121
Peripheral Pin Select ................................................ 123
Pull-ups and Pull-Downs........................................... 123
I
2
C
Clock Rates .............................................................. 177
Communicating as Master in a Single
Master Environment ......................................... 175
Reserved Addresses ................................................ 177
Setting Baud Rate When Operating as
Bus Master ....................................................... 177
Slave Address Masking ............................................ 177
Input Capture
32-Bit Mode .............................................................. 152
Operations ................................................................ 152
Synchronous and Trigger Modes.............................. 151
Input Capture with Dedicated Timers ............................... 151
Instruction Based Power-Saving Modes........................... 111
Deep Sleep....................................................... 112, 119
Idle............................................................................ 112
Sleep ........................................................................ 111
Instruction Set
Overview................................................................... 257
Summary .................................................................. 255
Symbols Used in Opcode Descriptions .................... 256
Inter-Integrated Circuit. See I
2
C. ...................................... 175
Internet Address ............................................................... 303
Interrupt Vector Table (IVT) ................................................ 65
Interrupts
Control and Status Registers...................................... 68
Implemented Vectors.................................................. 67
Reset Sequence ......................................................... 65
Setup and Service Procedures................................... 99
Trap Vectors ............................................................... 66
Vector Table ............................................................... 66
J
JTAG Interface.................................................................. 250
M
Microchip Internet Web Site.............................................. 303
MPLAB ASM30 Assembler, Linker, Librarian ................... 252
MPLAB Integrated Development
Environment Software .............................................. 251
MPLAB PM3 Device Programmer .................................... 254
MPLAB REAL ICE In-Circuit Emulator System ................ 253
MPLINK Object Linker/MPLIB Object Librarian ................ 252