Datasheet
2010 Microchip Technology Inc. DS39951C-page 11
PIC24FJ64GA104 FAMILY
TABLE 1-1: DEVICE FEATURES FOR THE PIC24FJ64GA104 FAMILY
Features PIC24FJ32GA102 PIC24FJ64GA102 PIC24FJ32GA104 PIC24FJ64GA104
Operating Frequency DC – 32 MHz
Program Memory (bytes) 32K 64K 32K 64K
Program Memory (instructions) 11,008 22,016 11,008 22,016
Data Memory (bytes) 8,192
Interrupt Sources (soft vectors/
NMI traps)
45 (41/4)
I/O Ports Ports A and B Ports A, B, C
Total I/O Pins 21 35
Remappable Pins 16 26
Timers:
Total Number (16-bit) 5
(1)
32-Bit (from paired 16-bit timers) 2
Input Capture Channels 5
(1)
Output Compare/PWM Channels 5
(1)
Input Change Notification Interrupt 21 31
Serial Communications:
UART 2
(1)
SPI (3-wire/4-wire) 2
(1)
I
2
C™ 2
Parallel Communications (PMP/PSP) Yes
JTAG Boundary Scan Yes
10-Bit Analog-to-Digital Module
(input channels)
10 13
Analog Comparators 3
CTMU Interface Yes
Resets (and delays) POR, BOR, RESET Instruction, MCLR
, WDT; Illegal Opcode,
REPEAT Instruction, Hardware Traps, Configuration Word Mismatch
(PWRT, OST, PLL Lock)
Instruction Set 76 Base Instructions, Multiple Addressing Mode Variations
Packages 28-Pin QFN, SOIC, SSOP and SPDIP 44-Pin QFN and TQFP
Note 1: Peripherals are accessible through remappable pins.