Datasheet

ManualsBrandsMICROCHIP TECHNOLOGY ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller QFN 28 (6x6) 16-Bit 32 MHz I/O number 21

PIC24FJ64GA104 FAMILY

DS39951C-page 46  2010 Microchip Technology Inc.

TABLE 4-23: SYSTEM REGISTER MAP

File Name Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

All

Resets

RCON 0740 TRAPR IOPUWR

— — — DPSLP CM PMSLP EXTR SWR SWDTEN WDTO SLEEP IDLE BOR POR Note 1

OSCCON 0742

— COSC2 COSC1 COSC0 — NOSC2 NOSC1 NOSC0 CLKLOCK IOLOCK LOCK — CF POSCEN SOSCEN OSWEN Note 2

CLKDIV 0744 ROI DOZE2 DOZE1 DOZE0 DOZEN RCDIV2 RCDIV1 RCDIV0

— — — — — — — — 0100

OSCTUN 0748

— — — — — — — — — — TUN5 TUN4 TUN3 TUN2 TUN1 TUN0 0000

REFOCON 074E ROEN

— ROSSLP ROSEL RODIV3 RODIV2 RODIV1 RODIV0 — — — — — — — — 0000

Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.

Note 1: The Reset value of the RCON register is dependent on the type of Reset event. See Section 6.0 “Resets” for more information.

2: The Reset value of the OSCCON register is dependent on both the type of Reset event and the device configuration. See Section 8.0 “Oscillator Configuration” for more information.

TABLE 4-24: DEEP SLEEP REGISTER MAP

File Name Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

All

Resets

(1)

DSCON 758 DSEN — — — — — — — — — — — — — DSBOR RELEASE 0000

DSWAKE 075A

— — — — — — — DSINT0 DSFLT — — DSWDT DSRTC DSMCLR — DSPOR 0001

DSGPR0 075C Deep Sleep General Purpose Register 0 0000

DSGPR1 075E Deep Sleep General Purpose Register 1 0000

Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.

Note 1: The Deep Sleep registers are only reset on a V

DD POR event.

TABLE 4-25: NVM REGISTER MAP

File Name Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

All

Resets

NVMCON 0760 WR WREN WRERR

— — — — — —ERASE— — NVMOP3 NVMOP2 NVMOP1 NVMOP0 0000

(1)

NVMKEY 0766 — — — — — — — — NVMKEY Register<7:0> 0000

Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.

Note 1: Reset value shown is for POR only. Value on other Reset states is dependent on the state of memory write or erase operations at the time of Reset.

TABLE 4-26: PMD REGISTER MAP

File Name Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

All

Resets

PMD1 0770 T5MD T4MD T3MD T2MD T1MD

— — — I2C1MD U2MD U1MD SPI2MD SPI1MD — — ADC1MD 0000

PMD2 0772

— — — IC5MD IC4MD IC3MD IC2MD IC1MD — — — OC5MD OC4MD OC3MD OC2MD OC1MD 0000

PMD3 0774

— — — — — CMPMD RTCCMD PMPMD CRCMD — — — — —I2C2MD— 0000

PMD4 0776

— — — — — — — — — — — — REFOMD CTMUMD LVDMD — 0000

Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.