Datasheet
2010 Microchip Technology Inc. DS39951C-page 299
PIC24FJ64GA104 FAMILY
INDEX
A
A/D Converter
Analog Input Model ................................................... 227
Transfer Function...................................................... 228
AC Characteristics
ADC Specifications ................................................... 281
Capacitive Loading Requirements on
Output Pins ....................................................... 277
CLKO and I/O Timing................................................ 280
Conversion Requirements ........................................ 282
External Clock Requirements ................................... 278
Internal RC Oscillator Accuracy ................................ 279
Internal RC Oscillator Specifications......................... 279
Load Conditions and Requirements for
Timing Specifications ....................................... 277
PLL Clock Timing Specifications............................... 279
Reset, Power-up Timer and Brown-out
Reset Timing..................................................... 280
Temperature and Voltage Specifications .................. 277
Alternate Interrupt Vector Table (AIVT) .............................. 65
Assembler
MPASM Assembler................................................... 252
B
Block Diagrams
10-Bit High-Speed A/D Converter............................. 220
16-Bit Asynchronous Timer3 and Timer5 ................. 147
16-Bit Synchronous Timer2 and Timer4 ................... 147
16-Bit Timer1 Module................................................ 143
32-Bit Timer2/3 and Timer4/5 ................................... 146
8-Bit Multiplexed Address and Data
Application Example ......................................... 200
Accessing Program Memory Using
Table Instructions .............................................. 49
Addressable PSP Example....................................... 198
Addressing for Table Registers................................... 51
CALL Stack Frame...................................................... 47
Comparator Voltage Reference ................................ 233
CPU Programmer’s Model .......................................... 27
CRC Module ............................................................. 213
CRC Shift Engine...................................................... 213
CTMU Connections and Internal Configuration
for Capacitance Measurement.......................... 235
CTMU Typical Connections and Internal
Configuration for Pulse Delay Generation ........ 236
CTMU Typical Connections and Internal
Configuration for Time Measurement ............... 236
Data Access From Program Space Address
Generation .......................................................... 48
I
2
C Module ................................................................ 176
Individual Comparator Configurations....................... 230
Input Capture ............................................................ 151
LCD Control Example, Byte Mode ............................ 200
Legacy PSP Example ............................................... 198
Master Mode, Demultiplexed Addressing ................. 198
Master Mode, Fully Multiplexed Addressing ............. 199
Master Mode, Partially Multiplexed Addressing ........ 199
Multiplexed Addressing Application Example ........... 199
On-Chip Regulator Connections ............................... 246
Output Compare (16-Bit Mode)................................. 156
Parallel EEPROM Example, 16-Bit Data .................. 200
Parallel EEPROM Example, 8-Bit Data .................... 200
Partially Multiplexed Addressing Application
Example ........................................................... 199
PIC24F CPU Core...................................................... 26
PIC24FJ64GA104 Family (General)........................... 12
PMP Module Overview ............................................. 191
PSV Operation............................................................ 50
Reset System ............................................................. 59
RTCC........................................................................ 201
Shared I/O Port Structure ......................................... 121
SPI Master, Frame Master Connection .................... 173
SPI Master, Frame Slave Connection ...................... 173
SPI Master/Slave Connection
(Enhanced Buffer Modes)................................. 172
SPI Master/Slave Connection (Standard Mode)....... 172
SPI Slave, Frame Master Connection ...................... 173
SPI Slave, Frame Slave Connection ........................ 173
SPIx Module (Enhanced Mode)................................ 167
SPIx Module (Standard Mode) ................................. 166
System Clock............................................................ 101
Triple Comparator Module........................................ 229
UART (Simplified)..................................................... 183
Watchdog Timer (WDT)............................................ 248
C
C Compilers
MPLAB C18.............................................................. 252
Charge Time Measurement Unit. See CTMU.
Code Examples
Basic Sequence for Clock Switching ........................ 107
Configuring UART1 Input and Output
Functions (PPS), ‘C’ ......................................... 128
Configuring UART1 Input and Output
Functions (PPS), Assembly.............................. 128
Erasing a Program Memory Block, ‘C’........................ 55
Erasing a Program Memory Block, Assembly ............ 54
I/O Port Write/Read .................................................. 122
Initiating a Programming Sequence, ‘C’ ..................... 56
Initiating a Programming Sequence, Assembly.......... 56
Loading the Write Buffers, ‘C’..................................... 56
Loading the Write Buffers, Assembly ......................... 55
PWRSAV Instruction Syntax .................................... 111
Setting the RTCWREN Bit........................................ 202
Single-Word Flash Programming, ‘C’ ......................... 57
Single-Word Flash Programming, Assembly.............. 57
Code Protection ................................................................ 248
Code Segment.......................................................... 249
Code Segment Protection
Configuration Options....................................... 249
Configuration Register .............................................. 249
General Segment ..................................................... 248
Comparator Voltage Reference ........................................ 233
Configuring ............................................................... 233
Configuration Bits ............................................................. 239
Core Features....................................................................... 9
CPU
Arithmetic Logic Unit (ALU) ........................................ 29
Control Registers........................................................ 28
Core Registers............................................................ 27
Programmer’s Model .................................................. 25