Datasheet

2010 Microchip Technology Inc. DS39951C-page 197
PIC24FJ64GA104 FAMILY
REGISTER 18-6: PADCFG1: PAD CONFIGURATION CONTROL REGISTER
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
bit 15 bit 8
U-0 U-0 U-0 U-0 U-0 R/W-0 R/W-0 R/W-0
RTSECSEL1
(1)
RTSECSEL0
(1)
PMPTTL
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-3 Unimplemented: Read as ‘0
bit 2-1 RTSECSEL<1:0>: RTCC Seconds Clock Output Select bits
(1)
11 = Reserved; do not use
10 = RTCC source clock is selected for the RTCC pin (clock can be LPRC or SOSC, depending on the
setting of the Flash Configuration bit, RTCOSC (CW4<5>))
01 = RTCC seconds clock is selected for the RTCC pin
00 = RTCC alarm pulse is selected for the RTCC pin
bit 0 PMPTTL: PMP Module TTL Input Buffer Select bit
1 = PMP module uses TTL input buffers
0 = PMP module uses Schmitt Trigger input buffers
Note 1: To enable the actual RTCC output, the RTCOE (RCFGCAL<10>) bit needs to be set.