Datasheet

 2010 Microchip Technology Inc. DS39951C-page 181
PIC24FJ64GA104 FAMILY
bit 4 P: Stop bit
1 = Indicates that a Stop bit has been detected last
0 = Stop bit was not detected last
Hardware set or clear when Start, Repeated Start or Stop is detected.
bit 3 S: Start bit
1 = Indicates that a Start (or Repeated Start) bit has been detected last
0 = Start bit was not detected last
Hardware set or clear when Start, Repeated Start or Stop is detected.
bit 2 R/W
: Read/Write Information bit (when operating as I
2
C slave)
1 = Read – indicates data transfer is output from the slave
0 = Write – indicates data transfer is input to the slave
Hardware set or clear after reception of I
2
C device address byte.
bit 1 RBF: Receive Buffer Full Status bit
1 = Receive is complete, I2CxRCV is full
0 = Receive is not complete, I2CxRCV is empty
Hardware set when I2CxRCV is written with received byte. Hardware clear when software reads I2CxRCV.
bit 0 TBF: Transmit Buffer Full Status bit
1 = Transmit is in progress, I2CxTRN is full
0 = Transmit is complete, I2CxTRN is empty
Hardware set when software writes I2CxTRN. Hardware clear at completion of data transmission.
REGISTER 16-2: I2CxSTAT: I2Cx STATUS REGISTER (CONTINUED)