Datasheet

 2010-2013 Microchip Technology Inc. DS39881E-page 55

PIC24FJ64GA004 FAMILY

TABLE 6-1: RESET FLAG BIT OPERATION

bit 2 IDLE: Wake-up from Idle Flag bit

1 = Device has been in Idle mode

0 = Device has not been in Idle mode

bit 1 BOR: Brown-out Reset Flag bit

1 = A Brown-out Reset has occurred (note that BOR is also set after a Power-on Reset)

0 = A Brown-out Reset has not occurred

bit 0 POR: Power-on Reset Flag bit

1 = A Power-on Reset has occurred

0 = A Power-on Reset has not occurred

Flag Bit Setting Event Clearing Event

TRAPR (RCON<15>) Trap Conflict Event POR

IOPUWR (RCON<14>) Illegal Opcode or Uninitialized W Register Access POR

CM (RCON<9>) Configuration Mismatch Reset POR

EXTR (RCON<7>) MCLR

Reset POR

SWR (RCON<6>) RESET Instruction POR

WDTO (RCON<4>) WDT Time-out PWRSAV Instruction, POR

SLEEP (RCON<3>) PWRSAV #SLEEP Instruction POR

IDLE (RCON<2>) PWRSAV #IDLE Instruction POR

BOR (RCON<1>) POR, BOR —

POR (RCON<0>) POR —

Note: All Reset flag bits may be set or cleared by the user software.

(1)

(CONTINUED)

Note 1: All of the Reset status bits may be set or cleared in software. Setting one of these bits in software does not

cause a device Reset.

2: If the FWDTEN Configuration bit is ‘1’ (unprogrammed), the WDT is always enabled, regardless of the

SWDTEN bit setting.