Datasheet

 2010-2013 Microchip Technology Inc. DS39881E-page 199
PIC24FJ64GA004 FAMILY
REGISTER 21-5: AD1PCFG: A/D PORT CONFIGURATION REGISTER
R/W-0 U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
PCFG15 — — PCFG12 PCFG11 PCFG10 PCFG9 PCFG8
(1)
bit 15 bit 8
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
PCFG7
(1)
PCFG6
(1)
PCFG5 PCFG4 PCFG3 PCFG2 PCFG1 PCFG0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 PCFG15: Analog Input Pin Configuration Control bit
1 = Band gap voltage reference is disabled
0 = Band gap voltage reference is enabled
bit 14-13 Unimplemented: Read as ‘0’
bit 12-0 PCFG<12:0>: Analog Input Pin Configuration Control bits
(1)
1 = Pin for corresponding analog channel is configured in Digital mode; I/O port read is enabled
0 = Pin is configured in Analog mode; I/O port read is disabled, A/D samples pin voltage
Note 1: Analog Channels, AN6, AN7 and AN8, are unavailable on 28-pin devices; leave these corresponding bits set.
REGISTER 21-6: AD1CSSL: A/D INPUT SCAN SELECT REGISTER
R/W-0 U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
CSSL15 — — CSSL12 CSSL11 CSSL10 CSSL9 CSSL8
(1)
bit 15 bit 8
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
CSSL7
(1)
CSSL6
(1)
CSSL5 CSSL4 CSSL3 CSSL2 CSSL1 CSSL0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 CSSL15: Band Gap Reference Input Pin Scan Selection bit
1 = Band gap voltage reference channel is selected for input scan
0 = Band gap voltage reference channel is omitted from input scan
bit 14-13 Unimplemented: Read as ‘0’
bit 12-0 CSSL<12:0>: A/D Input Pin Scan Selection bits
(1)
1 = Corresponding analog channel is selected for input scan
0 = Analog channel is omitted from input scan
Note 1: Analog Channels, AN6, AN7 and AN8, are unavailable on 28-pin devices; leave these corresponding bits
cleared.