Datasheet

 2010-2013 Microchip Technology Inc. DS39881E-page 133
PIC24FJ64GA004 FAMILY
13.0 INPUT CAPTURE
FIGURE 13-1: INPUT CAPTURE x BLOCK DIAGRAM
Note: This data sheet summarizes the features of
this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. For more information, refer to the
“PIC24F Family Reference Manual”,
“Input Capture” (DS39701).
ICxBUF
ICx Pin
ICM<2:0> (ICxCON<2:0>)
Mode Select
3
10
Set Flag ICxIF
(in IFSx Register)
TMRy
TMRx
Edge Detection Logic
16 16
FIFO
R/W
Logic
ICI<1:0>
ICOV, ICBNE (ICxCON<4:3>)
ICxCON
Interrupt
Logic
System Bus
From 16-Bit Timers
ICTMR
(ICxCON<7>)
FIFO
Prescaler
Counter
(1, 4, 16)
and
Clock Synchronizer
Note 1: An ‘x’ in a signal, register or bit name denotes the number of the capture channel.
2: This peripheral’s inputs must be assigned to an available RPn pin before use. Please see Section 10.4
“Peripheral Pin Select (PPS)” for more information.