Datasheet

PIC24FJ64GA004 FAMILY
DS39881E-page 42 2010-2013 Microchip Technology Inc.
TABLE 4-22: CLOCK CONTROL REGISTER MAP
File
Name
Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
RCON 0740 TRAPR IOPUWR
CM PMSLP EXTR SWR SWDTEN WDTO SLEEP IDLE BOR POR (Note 1)
OSCCON 0742
COSC2 COSC1 COSC0 NOSC2 NOSC1 NOSC0 CLKLOCK IOLOCK LOCK —CF SOSCEN OSWEN (Note 2)
CLKDIV 0744 ROI DOZE2 DOZE1 DOZE0 DOZEN RCDIV2 RCDIV1 RCDIV0
3140
OSCTUN 0748
TUN5 TUN4 TUN3 TUN2 TUN1 TUN0 0000
Legend: — = unimplemented, read as0. Reset values are shown in hexadecimal.
Note 1: RCON register Reset values are dependent on the type of Reset.
2: OSCCON register Reset values are dependent on configuration fuses and by the type of Reset.
TABLE 4-23: NVM REGISTER MAP
File Name Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
NVMCON 0760 WR WREN WRERR
ERASE NVMOP3NVMOP2NVMOP1NVMOP0 0000
(1)
NVMKEY 0766 NVMKEY<7:0> 0000
Legend: — = unimplemented, read as0. Reset values are shown in hexadecimal.
Note 1: Reset value shown is for a POR only. The value on other Reset states is dependent on the state of the memory write or erase operations at the time of Reset.
TABLE 4-24: PMD REGISTER MAP
File NameAddrBit 15Bit 14Bit 13Bit 12Bit 11Bit 10Bit 9Bit 8Bit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0
All
Resets
PMD1 0770 T5MD T4MD T3MD T2MD T1MD
I2C1MD U2MD U1MD SPI2MD SPI1MD —ADC1MD0000
PMD2 0772
IC5MD IC4MD IC3MD IC2MD IC1MD OC5MD OC4MD OC3MD OC2MD OC1MD 0000
PMD3 0774
CMPMD RTCCMD PMPMD CRCPMD —I2C2MD 0000
Legend: — = unimplemented, read as0. Reset values are shown in hexadecimal.