Datasheet
PIC24FJ64GA004 FAMILY
DS39881E-page 240 2010-2013 Microchip Technology Inc.
TABLE 27-7: DC CHARACTERISTICS: I/O PIN INPUT SPECIFICATIONS
DC CHARACTERISTICS
Standard Operating Conditions: 2.0V to 3.6V (unless otherwise stated)
Operating temperature -40°C TA +85°C for Industrial
-40°C T
A +125°C for Extended
Param
No.
Sym Characteristic Min Typ
(1)
Max Units Conditions
V
IL Input Low Voltage
(4)
DI10 I/O Pins VSS —0.2 VDD V
DI11 PMP Pins VSS —0.15 VDD VPMPTTL = 1
DI15 MCLR
VSS —0.2 VDD V
DI16 OSCI (XT mode) VSS —0.2 VDD V
DI17 OSCI (HS mode) V
SS —0.2 VDD V
DI18 I/O Pins with I
2
C™ Buffer VSS —0.3 VDD V SMBus disabled
DI19 I/O Pins with SMBus Buffer V
SS — 0.8 V SMBus enabled
V
IH Input High Voltage
(4)
DI20 I/O Pins:
with Analog Functions
Digital Only
0.8 V
DD
0.8 VDD
—
—
VDD
5.5
V
V
DI21 PMP Pins:
with Analog Functions
Digital Only
0.25 V
DD + 0.8
0.25 V
DD + 0.8
—
—
V
DD
5.5
V
V
PMPTTL = 1
DI25 MCLR
0.8 VDD —VDD V
DI26 OSCI (XT mode) 0.7 VDD —VDD V
DI27 OSCI (HS mode) 0.7 VDD —VDD V
DI28 I/O Pins with I
2
C Buffer:
with Analog Functions
Digital Only
0.7 V
DD
0.7 VDD
—
—
VDD
5.5
V
V
DI29 I/O Pins with SMBus Buffer:
with Analog Functions
Digital Only 2.1
2.1
—
—
V
DD
5.5
V
v2.5V VPIN VDD
DI30 ICNPU CNxx Pull-up Current 50 250 400 AVDD = 3.3V, VPIN = VSS
Note 1: Data in “Typ” column is at 3.3V, +25°C unless otherwise stated. Parameters are for design guidance only
and are not tested.
2: The leakage current on the MCLR
pin is strongly dependent on the applied voltage level. The specified
levels represent normal operating conditions. Higher leakage current may be measured at different input
voltages.
3: Negative current is defined as current sourced by the pin.
4: Refer to Table 1-2 for I/O pin buffer types.
5: Parameter is characterized but not tested.
6: Non-5V tolerant pins, V
IH source > (VDD + 0.3), 5V tolerant pins VIH source > 5.5V. Characterized but not
tested.
7: Digital 5V tolerant pins cannot tolerate any “positive” input injection current from input sources greater
than 5.5V.
8: Injection currents > | 0 | can affect the performance of all analog peripherals (e.g., A/D, comparators,
internal band gap reference, etc.)
9: Any number and/or combination of I/O pins not excluded under I
ICL or IICH conditions are permitted pro-
vided the mathematical “absolute instantaneous” sum of the input injection currents from all pins do not
exceed the specified limit. Characterized but not tested.