Datasheet
2010-2013 Microchip Technology Inc. DS39881E-page 35
PIC24FJ64GA004 FAMILY
TABLE 4-6: TIMER REGISTER MAP
File Name Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
TMR1 0100 Timer1 Register 0000
PR1 0102 Timer1 Period Register FFFF
T1CON 0104 TON
—TSIDL— — — — — — TGATE TCKPS1 TCKPS0 — TSYNC TCS — 0000
TMR2 0106 Timer2 Register 0000
TMR3HLD 0108 Timer3 Holding Register (for 32-bit timer operations only) 0000
TMR3 010A Timer3 Register 0000
PR2 010C Timer2 Period Register FFFF
PR3 010E Timer3 Period Register FFFF
T2CON 0110 TON
—TSIDL— — — — — — TGATE TCKPS1 TCKPS0 T32 —TCS— 0000
T3CON 0112 TON
—TSIDL— — — — — — TGATE TCKPS1 TCKPS0 — —TCS— 0000
TMR4 0114 Timer4 Register 0000
TMR5HLD 0116 Timer5 Holding Register (for 32-bit operations only) 0000
TMR5 0118 Timer5 Register 0000
PR4 011A Timer4 Period Register FFFF
PR5 011C Timer5 Period Register FFFF
T4CON 011E TON
—TSIDL— — — — — — TGATE TCKPS1 TCKPS0 T32 —TCS— 0000
T5CON 0120 TON
—TSIDL— — — — — — TGATE TCKPS1 TCKPS0 — —TCS— 0000
Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
TABLE 4-7: INPUT CAPTURE REGISTER MAP
File
Name
Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
IC1BUF 0140 Input Capture 1 Register FFFF
IC1CON 0142
— —ICSIDL— — — — — ICTMR ICI1 ICI0 ICOV ICBNE ICM2 ICM1 ICM0 0000
IC2BUF 0144 Input Capture 2 Register FFFF
IC2CON 0146
— —ICSIDL— — — — — ICTMR ICI1 ICI0 ICOV ICBNE ICM2 ICM1 ICM0 0000
IC3BUF 0148 Input Capture 3 Register FFFF
IC3CON 014A
— —ICSIDL— — — — — ICTMR ICI1 ICI0 ICOV ICBNE ICM2 ICM1 ICM0 0000
IC4BUF 014C Input Capture 4 Register FFFF
IC4CON 014E
— —ICSIDL— — — — — ICTMR ICI1 ICI0 ICOV ICBNE ICM2 ICM1 ICM0 0000
IC5BUF 0150 Input Capture 5 Register FFFF
IC5CON 0152
— —ICSIDL— — — — — ICTMR ICI1 ICI0 ICOV ICBNE ICM2 ICM1 ICM0 0000
Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.