Datasheet

2010 Microchip Technology Inc. DS39975A-page 55
PIC24FJ256GB210 FAMILY
TABLE 4-11: UART REGISTER MAPS
File
Name
Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
U1MODE 0220 UARTEN
USIDL IREN RTSMD UEN1 UEN0 WAKE LPBACK ABAUD RXINV BRGH PDSEL1 PDSEL0 STSEL 0000
U1STA 0222 UTXISEL1 UTXINV UTXISEL0
UTXBRK UTXEN UTXBF TRMT URXISEL1 URXISEL0 ADDEN RIDLE PERR FERR OERR URXDA 0110
U1TXREG 0224
UART1 Transmit Register xxxx
U1RXREG 0226
UART1 Receive Register 0000
U1BRG 0228 UART1 Baud Rate Generator Prescaler Register 0000
U2MODE 0230 UARTEN
USIDL IREN RTSMD UEN1 UEN0 WAKE LPBACK ABAUD RXINV BRGH PDSEL1 PDSEL0 STSEL 0000
U2STA 0232 UTXISEL1 UTXINV UTXISEL0
UTXBRK UTXEN UTXBF TRMT URXISEL1 URXISEL0 ADDEN RIDLE PERR FERR OERR URXDA 0110
U2TXREG 0234
UART2 Transmit Register xxxx
U2RXREG 0236
UART2 Receive Register 0000
U2BRG 0238 UART2 Baud Rate Generator Prescaler Register 0000
U3MODE 0250 UARTEN
USIDL IREN RTSMD UEN1 UEN0 WAKE LPBACK ABAUD RXINV BRGH PDSEL1 PDSEL0 STSEL 0000
U3STA 0252 UTXISEL1 UTXINV UTXISEL0
UTXBRK UTXEN UTXBF TRMT URXISEL1 URXISEL0 ADDEN RIDLE PERR FERR OERR URXDA 0110
U3TXREG 0254
UART3 Transmit Register xxxx
U3RXREG 0256
UART3 Receive Register 0000
U3BRG 0258 UART3 Baud Rate Generator Prescaler Register 0000
U4MODE 02B0 UARTEN
USIDL IREN RTSMD UEN1 UEN0 WAKE LPBACK ABAUD RXINV BRGH PDSEL1 PDSEL0 STSEL 0000
U4STA 02B2 UTXISEL1 UTXINV UTXISEL0
UTXBRK UTXEN UTXBF TRMT URXISEL1 URXISEL0 ADDEN RIDLE PERR FERR OERR URXDA 0110
U4TXREG 02B4
UART4 Transmit Register xxxx
U4RXREG 02B6
UART4 Receive Register 0000
U4BRG 02B8 UART4 Baud Rate Generator Prescaler Register 0000
Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.