Datasheet

2010 Microchip Technology Inc. DS39975A-page 51
PIC24FJ256GB210 FAMILY
IPC16 00C4 CRCIP2 CRCIP1 CRCIP0 U2ERIP2 U2ERIP1 U2ERIP0 U1ERIP2 U1ERIP1 U1ERIP0
4440
IPC18 00C8 LVDIP2 LVDIP1 LVDIP0
0004
IPC19 00CA CTMUIP2 CTMUIP1 CTMUIP0
0040
IPC20 00CC U3TXIP2 U3TXIP1 U3TXIP0 U3RXIP2 U3RXIP1 U3RXIP0 U3ERIP2 U3ERIP1 U3ERIP0
4440
IPC21 00CE U4ERIP2 U4ERIP1 U4ERIP0 USB1IP2 USB1IP1 USB1IP0 MI2C3IP2 MI2C3IP1 MI2C3IP0 SI2C3IP2 SI2C3IP1 SI2C3IP0
4444
IPC22 00D0 SPI3IP2 SPI3IP1 SPI3IP0 SPF3IP2 SPF3IP1 SPF3IP0 U4TXIP2 U4TXIP1 U4TXIP0 U4RXIP2 U4RXIP1 U4RXIP0
4444
IPC23 00D2 IC9IP2 IC9IP1 IC9IP0 OC9IP2 OC9IP1 OC9IP0
0044
INTTREG 00E0 CPUIRQ —VHOLD ILR3 ILR2 ILR1 ILR0 VECNUM6 VECNUM5 VECNUM4 VECNUM3 VECNUM2 VECNUM1 VECNUM0
0000
TABLE 4-6: INTERRUPT CONTROLLER REGISTER MAP (CONTINUED)
File Name Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
Legend:
— = unimplemented, read as
0
’. Reset values are shown in hexadecimal.
TABLE 4-7: TIMER REGISTER MAP
File
Name
Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
TMR1 0100 Timer1 Register 0000
PR1 0102 Timer1 Period Register FFFF
T1CON 0104 TON
—TSIDL TGATE TCKPS1 TCKPS0 TSYNC TCS 0000
TMR2 0106 Timer2 Register 0000
TMR3HLD 0108 Timer3 Holding Register (for 32-bit timer operations only) 0000
TMR3 010A Timer3 Register 0000
PR2 010C Timer2 Period Register FFFF
PR3 010E Timer3 Period Register FFFF
T2CON 0110 TON
—TSIDL TGATE TCKPS1 TCKPS0 T32 —TCS 0000
T3CON 0112 TON
—TSIDL TGATE TCKPS1 TCKPS0 —TCS 0000
TMR4 0114 Timer4 Register 0000
TMR5HLD 0116 Timer5 Holding Register (for 32-bit operations only) 0000
TMR5 0118 Timer5 Register 0000
PR4 011A Timer4 Period Register FFFF
PR5 011C Timer5 Period Register FFFF
T4CON 011E TON
—TSIDL TGATE TCKPS1 TCKPS0 T45 —TCS 0000
T5CON 0120 TON
—TSIDL TGATE TCKPS1 TCKPS0 —TCS 0000
Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.