Datasheet

2009 Microchip Technology Inc. DS39897C-page 55
PIC24FJ256GB110 FAMILY
U1EP0 04AA LSPD
(1)
RETRYDIS
(1)
EPCONDIS EPRXEN EPTXEN EPSTALL EPHSHK 0000
U1EP1 04AC
EPCONDIS EPRXEN EPTXEN EPSTALL EPHSHK 0000
U1EP2 04AE
EPCONDIS EPRXEN EPTXEN EPSTALL EPHSHK 0000
U1EP3 04B0
EPCONDIS EPRXEN EPTXEN EPSTALL EPHSHK 0000
U1EP4 04B2
EPCONDIS EPRXEN EPTXEN EPSTALL EPHSHK 0000
U1EP5 04B4
EPCONDIS EPRXEN EPTXEN EPSTALL EPHSHK 0000
U1EP6 04B6
EPCONDIS EPRXEN EPTXEN EPSTALL EPHSHK 0000
U1EP7 04B8
EPCONDIS EPRXEN EPTXEN EPSTALL EPHSHK 0000
U1EP8 04BA
EPCONDIS EPRXEN EPTXEN EPSTALL EPHSHK 0000
U1EP9 04BC
EPCONDIS EPRXEN EPTXEN EPSTALL EPHSHK 0000
U1EP10 04BE
EPCONDIS EPRXEN EPTXEN EPSTALL EPHSHK 0000
U1EP11 04C0
EPCONDIS EPRXEN EPTXEN EPSTALL EPHSHK 0000
U1EP12 04C2
EPCONDIS EPRXEN EPTXEN EPSTALL EPHSHK 0000
U1EP13 04C4
EPCONDIS EPRXEN EPTXEN EPSTALL EPHSHK 0000
U1EP14 04C6
EPCONDIS EPRXEN EPTXEN EPSTALL EPHSHK 0000
U1EP15 04C8
EPCONDIS EPRXEN EPTXEN EPSTALL EPHSHK 0000
U1PWMRRS 04CC USB Power Supply PWM Duty Cycle Register USB Power Supply PWM Period Register 0000
U1PWMCON 04CE PWMEN
PWMPOL CNTEN 0000
TABLE 4-23: PARALLEL MASTER/SLAVE PORT REGISTER MAP
File Name Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
PMCON 0600 PMPEN
PSIDL ADRMUX1 ADRMUX0 PTBEEN PTWREN PTRDEN CSF1 CSF0 ALP CS2P CS1P BEP WRSP RDSP 0000
PMMODE 0602 BUSY IRQM1 IRQM0 INCM1 INCM0 MODE16 MODE1 MODE0 WAITB1 WAITB0 WAITM3 WAITM2 WAITM1 WAITM0 WAITE1 WAITE0 0000
PMADDR 0604 CS2 CS1 ADDR13 ADDR12 ADDR11 ADDR10 ADDR9 ADDR8 ADDR7 ADDR6 ADDR5 ADDR4 ADDR3 ADDR2 ADDR1 ADDR0 0000
PMDOUT1 Parallel Port Data Out Register 1 (Buffers 0 and 1) 0000
PMDOUT2 0606 Parallel Port Data Out Register 2 (Buffers 2 and 3) 0000
PMDIN1 0608 Parallel Port Data In Register 1 (Buffers 0 and 1) 0000
PMDIN2 060A Parallel Port Data In Register 2 (Buffers 2 and 3) 0000
PMAEN 060C PTEN15 PTEN14 PTEN13 PTEN12 PTEN11 PTEN10 PTEN9 PTEN8 PTEN7 PTEN6 PTEN5 PTEN4 PTEN3 PTEN2 PTEN1 PTEN0 0000
PMSTAT 060E IBF IBOV
IB3F IB2F IB1F IB0F OBE OBUF OB3E OB2E OB1E OB0E 0000
Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
TABLE 4-22: USB OTG REGISTER MAP (CONTINUED)
File Name Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Note 1: Alternate register or bit definitions when the module is operating in Host mode.
2: This register is available in Host mode only.