Datasheet

PIC24FJ256GB110 FAMILY
DS39897C-page 52 2009 Microchip Technology Inc.
TABLE 4-16: PORTE REGISTER MAP
File
Name
Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9
(1)
Bit 8
(1)
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
TRISE 02E0
TRISE9 TRISE8 TRISE7 TRISE6 TRISE5 TRISE4 TRISE3 TRISE2 TRISE1 TRISE0 03FF
PORTE 02E2
RE9 RE8 RE7 RE6 RE5 RE4 RE3 RE2 RE1 RE0 xxxx
LATE 02E4
LATE9 LATE8 LATE7 LATE6 LATE5 LATE4 LATE3 LATE2 LATE1 LATE0 xxxx
ODCE 02E6
ODE9 ODE8 ODE7 ODE6 ODE5 ODE4 ODE3 ODE2 ODE1 ODE0 0000
Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal. Reset values shown are for 100-pin devices.
Note 1: Bits are unimplemented on 64-pin devices; read as ‘0’.
TABLE 4-17: PORTF REGISTER MAP
File
Name
Addr Bit 15 Bit 14 Bit 13
(1)
Bit 12
(1)
Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2
(2)
Bit 1 Bit 0
All
Resets
TRISF 02E8
TRISF13 TRISF12 TRISF5 TRISF4 TRISF3 TRISF2 TRISF1 TRISF0 31FF
PORTF 02EA
RF13 RF12 RF5 RF4 RF3 RF2 RF1 RF0 xxxx
LATF 02EC
L ATF13 LATF12 LATF5 LATF4 LATF3 LATF2 LATF1 LATF0 xxxx
ODCF 02EE
—ODF13ODF12 ODF5 ODF4 ODF3 ODF2 ODF1 ODF0 0000
Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal. Reset values shown are for 100-pin devices.
Note 1: Bits are unimplemented on 64-pin and 80-pin devices; read as ‘0’.
2: Bits are unimplemented on 64-pin devices; read as ‘0’.
TABLE 4-18: PORTG REGISTER MAP
File
Name
Addr Bit 15
(1)
Bit 14
(1)
Bit 13
(1)
Bit 12
(1)
Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1
(2)
Bit 0
(2)
All
Resets
TRISG 02F0 TRISG15 TRISG14 TRISG13 TRISG12
TRISG9 TRISG8 TRISG7 TRISG6 TRISG3 TRISG2 TRISG1 TRISG0 F3CF
PORTG 02F2 RG15 RG14 RG13 RG12
RG9 RG8 RG7 RG6 RG3 RG2 RG1 RG0 xxxx
LATG 02F4LATG15LATG14LATG13LATG12
—LATG9LATG8LATG7LATG6 —LATG3LATG2LATG1LATG0xxxx
ODCG 02F6 ODG15 ODG14 ODG13 ODG12
ODG9 ODG8 ODG7 ODG6 ODG3 ODG2 ODG1 ODG0 0000
Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal. Reset values shown are for 100-pin devices.
Note 1: Bits unimplemented on 64-pin and 80-pin devices; read as ‘0’.
2: Bits unimplemented on 64-pin devices; read as ‘0’.
TABLE 4-19: PAD CONFIGURATION REGISTER MAP
File Name Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
PADCFG1 02FC
RTSECSEL PMPTTL 0000
Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.