Datasheet
2009 Microchip Technology Inc. DS39897C-page 5
PIC24FJ256GB110 FAMILY
Pin Diagram (64-Pin TQFP and QFN)
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
48
47
22
44
24
25
26
27
28
29
30
31
32
PIC24FJ64GB106
1
46
45
23
43
42
41
40
39
C3INB/CN15/RD6
RP20/PMRD/CN14/RD5
RP25/PMWR/CN13/RD4
RP22/PMBE/CN52/RD3
DPH/RP23/CN51/RD2
V
CPCON/RP24/CN50/RD1
PMD4/CN62/RE4
PMD3/CN61/RE3
PMD2/CN60/RE2
PMD1/CN59/RE1
V
BUSST/VCMPST1/CN68/RF0
V
CAP/VDDCORE
SOSCI/C3IND/CN1/RC13
DMH/RP11/INT0/CN49/RD0
SCL1/RP3/PMCS2/CN55/RD10
DPLN/SDA1/RP4/CN54/RD9
RTCC/DMLN/RP2/CN53/RD8
RP12/PMCS1/CN56/RD11
OSCO/CLKO/CN22/RC15
OSCI/CLKI/CN23/RC12
V
DD
D+/RG2
V
USB
VBUS
RP16/USBID/CN71/RF3
D-/RG3
SOSCO/T1CK/C3INC/RPI37/
AVDD
AN8/RP8/CN26/RB8
AN9/RP9/PMA7/CN27/RB9
TMS/CV
REF/AN10/PMA13/CN28/RB10
TDO/AN11/PMA12/CN29/RB11
V
DD
PGEC2/AN6/RP6/CN24/RB6
PGED2/AN7/RP7/RCV/CN25/RB7
SCL2/RP17/PMA8/CN18/RF5
SDA2/RP10/PMA9/CN17/RF4
PMD5/CN63/RE5
SCL3/PMD6/CN64/RE6
SDA3/PMD7/CN65/RE7
C1IND/RP21/PMA5/CN8/RG6
V
DD
PGEC3/AN5/C1INA/VBUSON/RP18/CN7/RB5
PGED3/AN4/C1INB/USBOEN/RP28/CN6/RB4
AN3/C2INA/VPIO/CN5/RB3
AN2/C2INB/VMIO/RP13/CN4/RB2
C1INC/RP26/PMA4/CN9/RG7
C2IND/RP19/PMA3/CN10/RG8
PGEC1/AN1/V
REF-/RP1/CN3/RB1
PGED1/AN0/V
REF+/RP0/PMA6/CN2/RB0
RP27/PMA2/C2INC/CN11/RG9
MCLR
TCK/AN12/PMA11/CTED2/CN30/RB12
TDI/AN13/PMA10/CTED1/CN31/RB13
AN14/CTPLS/RP14/PMA1/CN32/RB14
AN15/RP29/REFO/PMA0/CN12/RB15
PMD0/CN58/RE0
V
CMPST2/CN69/RF1
C3INA/CN16/RD7
VSS
VSS
VSS
ENVREG
63
62
61
59
60
58
57
56
54
55
53
52
51
49
50
38
37
34
36
35
33
17
19
20
21
18
AV
SS
64
CN0/RC14
PIC24FJ128GB106
PIC24FJ192GB106
PIC24FJ256GB106
Legend: Shaded pins indicate pins tolerant to up to +5.5 VDC.
RPn represents remappable pins for the Peripheral Pin Select feature.
Note 1: For QFN devices, the backplane on the underside of the device must also be connected to V
SS.