Datasheet
2009 Microchip Technology Inc. DS39897C-page 25
PIC24FJ256GB110 FAMILY
VBUS 34 44 54 P — USB Voltage, Host mode (5V).
V
BUSON 11 15 20 O — USB OTG External Charge Pump Control.
V
BUSST 58 72 87 I ANA USB OTG Internal Charge Pump Feedback Control.
V
CAP 56 70 85 P — External Filter Capacitor Connection (regulator enabled).
V
CMPST1 58 72 87 I ST USB VBUS Boost Generator, Comparator Input 1.
V
CMPST2 59 73 88 I ST USB VBUS Boost Generator, Comparator Input 2.
V
CPCON 49 61 76 O — USB OTG VBUS PWM/Charge Output.
V
DD 10, 26, 38 12, 32, 48 2, 16, 37,
46, 62
P — Positive Supply for Peripheral Digital Logic and I/O Pins.
V
DDCORE 56 70 85 P — Positive Supply for Microcontroller Core Logic (regulator
disabled).
VMIO 14 18 23 I/O ST USB Differential Minus Input/Output (external transceiver).
VPIO 13 17 22 I/O ST USB Differential Plus Input/Output (external transceiver).
V
REF- 15 23 28 I ANA A/D and Comparator Reference Voltage (low) Input.
V
REF+ 16 24 29 I ANA A/D and Comparator Reference Voltage (high) Input.
V
SS 9, 25, 41 11, 31, 51 15, 36, 45,
65, 75
P — Ground Reference for Logic and I/O Pins.
V
USB 35 45 55 P — USB Voltage (3.3V)
TABLE 1-4: PIC24FJ256GB110 FAMILY PINOUT DESCRIPTIONS (CONTINUED)
Function
Pin Number
I/O
Input
Buffer
Description
64-Pin
TQFP, QFN
80-Pin
TQFP
100-Pin
TQFP
Legend: TTL = TTL input buffer ST = Schmitt Trigger input buffer
ANA = Analog level input/output I
2
C™ = I
2
C/SMBus input buffer