Datasheet

PIC24FJ256GB110 FAMILY
DS39897C-page 230  2009 Microchip Technology Inc.
REGISTER 18-13: U1CNFG2: USB CONFIGURATION REGISTER 2
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
— — — — — — — —
bit 15 bit 8
U-0 U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
— — —
PUVBUS EXTI2CEN
UVBUSDIS
(1)
UVCMPDIS
(1)
UTRDIS
(1)
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-5 Unimplemented: Read as ‘0’
bit 4 PUVBUS: V
BUS Pull-up Enable bit
1 = Pull-up on V
BUS pin enabled
0 = Pull-up on V
BUS pin disabled
bit 3 EXTI2CEN: I
2
C™ Interface For External Module Control Enable bit
1 = External module(s) controlled via I
2
C interface
0 = External module(s) controller via dedicated pins
bit 2 UVBUSDIS: On-Chip 5V Boost Regulator Builder Disable bit
(1)
1 = On-chip boost regulator builder disabled; digital output control interface enabled
0 = On-chip boost regulator builder active
bit 1 UVCMPDIS: On-Chip V
BUS Comparator Disable bit
(1)
1 = On-chip charge VBUS comparator disabled; digital input status interface enabled
0 = On-chip charge V
BUS comparator active
bit 0 UTRDIS: On-Chip Transceiver Disable bit
(1)
1 = On-chip transceiver disabled; digital transceiver interface enabled
0 = On-chip transceiver active
Note 1: Never change these bits while the USBPWR bit is set (U1PWRC<0> = 1).