Datasheet

 2009 Microchip Technology Inc. DS39897C-page 109
PIC24FJ256GB110 FAMILY
REGISTER 7-29: IPC12: INTERRUPT PRIORITY CONTROL REGISTER 12
U-0 U-0 U-0 U-0 U-0 R/W-1 R/W-0 R/W-0
— — — — — MI2C2P2 MI2C2P1 MI2C2P0
bit 15 bit 8
U-0 R/W-1 R/W-0 R/W-0 U-0 U-0 U-0 U-0
— SI2C2P2 SI2C2P1 SI2C2P0 — — — —
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-11 Unimplemented: Read as ‘0’
bit 10-8 MI2C2P<2:0>: Master I2C2 Event Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
•
•
•
001 = Interrupt is priority 1
000 = Interrupt source is disabled
bit 7 Unimplemented: Read as ‘0’
bit 6-4 SI2C2P<2:0>: Slave I2C2 Event Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
•
•
•
001 = Interrupt is priority 1
000 = Interrupt source is disabled
bit 3-0 Unimplemented: Read as ‘0’