Datasheet

ManualsBrandsMICROCHIP TECHNOLOGY ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller TQFP 100 (14x14) 16-Bit 32 MHz I/O number 85

PIC24FJ256GA110 FAMILY

DS39905E-page 50  2010 Microchip Technology Inc.

TABLE 4-22: PARALLEL MASTER/SLAVE PORT REGISTER MAP

File

Name

Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

All

Resets

PMCON 0600 PMPEN

— PSIDL ADRMUX1 ADRMUX0 PTBEEN PTWREN PTRDEN CSF1 CSF0 ALP CS2P CS1P BEP WRSP RDSP 0000

PMMODE 0602 BUSY IRQM1 IRQM0 INCM1 INCM0 MODE16 MODE1 MODE0 WAITB1 WAITB0 WAITM3 WAITM2 WAITM1 WAITM0 WAITE1 WAITE0 0000

PMADDR 0604 CS2 CS1 ADDR13 ADDR12 ADDR11 ADDR10 ADDR9 ADDR8 ADDR7 ADDR6 ADDR5 ADDR4 ADDR3 ADDR2 ADDR1 ADDR0 0000

PMDOUT1 Parallel Port Data Out Register 1 (Buffers 0 and 1) 0000

PMDOUT2 0606 Parallel Port Data Out Register 2 (Buffers 2 and 3) 0000

PMDIN1 0608 Parallel Port Data In Register 1 (Buffers 0 and 1) 0000

PMDIN2 060A Parallel Port Data In Register 2 (Buffers 2 and 3) 0000

PMAEN 060C PTEN15 PTEN14 PTEN13 PTEN12 PTEN11 PTEN10 PTEN9 PTEN8 PTEN7 PTEN6 PTEN5 PTEN4 PTEN3 PTEN2 PTEN1 PTEN0 0000

PMSTAT 060E IBF IBOV

— — IB3F IB2F IB1F IB0F OBE OBUF — — OB3E OB2E OB1E OB0E 0000

Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.

TABLE 4-23: REAL-TIME CLOCK AND CALENDAR REGISTER MAP

File

Name

Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

All

Resets

ALRMVAL 0620 Alarm Value Register Window Based on ALRMPTR<1:0> xxxx

ALCFGRPT 0622 ALRMEN CHIME AMASK3 AMASK2 AMASK1 AMASK0 ALRMPTR1 ALRMPTR0 ARPT7 ARPT6 ARPT5 ARPT4 ARPT3 ARPT2 ARPT1 ARPT0 0000

RTCVAL 0624 RTCC Value Register Window Based on RTCPTR<1:0> xxxx

RCFGCAL 0626 RTCEN

— RTCWREN RTCSYNC HALFSEC RTCOE RTCPTR1 RTCPTR0 CAL7 CAL6 CAL5 CAL4 CAL3 CAL2 CAL1 CAL0 xxxx

Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.

TABLE 4-24: COMPARATORS REGISTER MAP

File

Name

Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

All

Resets

CMSTAT 0630 CMIDL

— — — — C3EVT C2EVT C1EVT — — — — — C3OUT C2OUT C1OUT 0000

CVRCON 0632

— — — — — — — — CVREN CVROE CVRR CVRSS CVR3 CVR2 CVR1 CVR0 0000

CM1CON 0634 CEN COE CPOL

— — — CEVT COUT EVPOL1 EVPOL0 — CREF — — CCH1 CCH0 0000

CM2CON 0636 CEN COE CPOL

— — — CEVT COUT EVPOL1 EVPOL0 — CREF — — CCH1 CCH0 0000

CM3CON 0638 CEN COE CPOL

— — — CEVT COUT EVPOL1 EVPOL0 — CREF — — CCH1 CCH0 0000

Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.

TABLE 4-25: CRC REGISTER MAP

File

Name

Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

All

Resets

CRCCON 0640

— — CSIDL VWORD4 VWORD3 VWORD2 VWORD1 VWORD0 CRCFUL CRCMPT — CRCGO PLEN3 PLEN2 PLEN1 PLEN0 0040

CRCXOR0642X15X14X13X12X11X10X9X8X7X6X5X4X3X2X1

— 0000

CRCDAT 0644 CRC Data Input Register 0000

CRCWDAT 0646 CRC Result Register 0000

Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.