Datasheet

 2010 Microchip Technology Inc. DS39905E-page 289
PIC24FJ256GA110 FAMILY
FIGURE 28-8: BAUD RATE GENERATOR OUTPUT TIMING
FIGURE 28-9: START BIT EDGE DETECTION
TABLE 28-22: AC SPECIFICATIONS
Symbol Characteristics Min Typ Max Units
T
LW BCLKx High Time 20 TCY/2 — ns
THW BCLKx Low Time 20 (TCY * BRGx) + TCY/2 — ns
T
BLD BCLKx Falling Edge Delay from UxTX -50 — 50 ns
TBHD BCLKx Rising Edge Delay from UxTX TCY/2 – 50 — TCY/2 + 50 ns
TWAK Min. Low on UxRX Line to Cause Wake-up — 1 — s
T
CTS Min. Low on UxCTS Line to Start
Transmission
TCY ——ns
T
SETUP Start bit Falling Edge to System Clock Rising
Edge Setup Time
3— —ns
T
STDELAY Maximum Delay in the Detection of the
Start bit Falling Edge
——TCY + TSETUP ns
BCLKx
UxTX
T
BLD
TBHD
BRGx + 1 * TCY TLW THW
BRGx
Cycle
Clock
UxRX
Any Value
T
STDELAY
TSETUP
TCY
Start bit Detected, BRGx Started