Datasheet

PIC24FJ256GA110 FAMILY
DS39905E-page 220  2010 Microchip Technology Inc.
19.3 Alarm
• Configurable from half second to one year
• Enabled using the ALRMEN bit
(ALCFGRPT<15>, Register 19-3)
• One-time alarm and repeat alarm options
available
19.3.1 CONFIGURING THE ALARM
The alarm feature is enabled using the ALRMEN bit.
This bit is cleared when an alarm is issued. Writes to
ALRMVAL should only take place when ALRMEN = 0.
As shown in Figure 19-2, the interval selection of the
alarm is configured through the AMASK bits
(ALCFGRPT<13:10>). These bits determine which and
how many digits of the alarm must match the clock
value for the alarm to occur.
The alarm can also be configured to repeat based on a
preconfigured interval. The amount of times this occurs
once the alarm is enabled is stored in the ARPT bits,
ARPT<7:0> (ALCFGRPT<7:0>). When the value of the
ARPT bits equals 00h and the CHIME bit
(ALCFGRPT<14>) is cleared, the repeat function is
disabled and only a single alarm will occur. The alarm
can be repeated up to 255 times by loading
ARPT<7:0> with FFh.
After each alarm is issued, the value of the ARPT bits
is decremented by one. Once the value has reached
00h, the alarm will be issued one last time, after which
the ALRMEN bit will be cleared automatically and the
alarm will turn off.
Indefinite repetition of the alarm can occur if the CHIME
bit = 1. Instead of the alarm being disabled when the
value of the ARPT bits reaches 00h, it rolls over to FFh
and continues counting indefinitely while CHIME is set.
19.3.2 ALARM INTERRUPT
At every alarm event, an interrupt is generated. In
addition, an alarm pulse output is provided that
operates at half the frequency of the alarm. This output
is completely synchronous to the RTCC clock and can
be used as a trigger clock to other peripherals.
FIGURE 19-2: ALARM MASK SETTINGS
Note: Changing any of the registers, other then
the RCFGCAL and ALCFGRPT registers,
and the CHIME bit while the alarm is
enabled (ALRMEN = 1), can result in a
false alarm event leading to a false alarm
interrupt. To avoid a false alarm event, the
timer and alarm values should only be
changed while the alarm is disabled
(ALRMEN = 0). It is recommended that
the ALCFGRPT register and CHIME bit be
changed when RTCSYNC = 0.
Note 1: Annually, except when configured for February 29.
s
ss
mss
mm s s
hh mm ss
dhhmmss
dd hh mm ss
mm d d h h mm s s
Day of
the
Week
Month Day Hours Minutes Seconds
Alarm Mask Setting
(AMASK<3:0>)
0000 – Every half second
0001 – Every second
0010 – Every 10 seconds
0011 – Every minute
0100 – Every 10 minutes
0101 – Every hour
0110 – Every day
0111 – Every week
1000 – Every month
1001 – Every year
(1)