Datasheet

2010 Microchip Technology Inc. DS39905E-page 13
PIC24FJ256GA110 FAMILY
TABLE 1-3: DEVICE FEATURES FOR THE PIC24FJ256GA110 FAMILY: 100-PIN DEVICES
Features PIC24FJ64GA110 PIC24FJ128GA110 PIC24FJ192GA110 PIC24FJ256GA110
Operating Frequency DC – 32 MHz
Program Memory (bytes) 64K 128K 192K 256K
Program Memory (instructions) 22,016 44,032 67,072 87,552
Data Memory (bytes) 16,384
Interrupt Sources
(soft vectors/NMI traps)
66 (62/4)
I/O Ports Ports A, B, C, D, E, F, G
Total I/O Pins 85
Remappable Pins 46 (32 I/O, 14 input only)
Timers:
5
(1)
Total Number (16-bit)
32-Bit (from paired 16-bit timers) 2
Input Capture Channels 9
(1)
Output Compare/PWM
Channels
9
(1)
Input Change Notification
Interrupt
85
Serial Communications:
UART 4
(1)
SPI (3-wire/4-wire) 3
(1)
I
2
C™ 3
Parallel Communications
(PMP/PSP)
Yes
JTAG Boundary Scan Yes
10-Bit Analog-to-Digital Module
(input channels)
16
Analog Comparators 3
CTMU Interface Yes
Resets (and delays) POR, BOR, RESET Instruction, MCLR
, WDT; Illegal Opcode,
REPEAT Instruction, Hardware Traps, Configuration Word Mismatch
(PWRT, OST, PLL Lock)
Instruction Set 76 Base Instructions, Multiple Addressing Mode Variations
Packages 100-Pin TQFP
Note 1: Peripherals are accessible through remappable pins.